[coreboot-gerrit] Patch set updated for coreboot: f49d591 Declare acpi_is_wakeup_early() only once

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Fri Jun 20 19:29:59 CEST 2014


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4525

-gerrit

commit f49d59158ada6a4fb403c58e6cc55c7786d209e1
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Dec 10 09:03:17 2013 +0200

    Declare acpi_is_wakeup_early() only once
    
    Change-Id: I5314d76168c40a6327d4a9ac3b4f4fb05497d6fc
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/include/arch/acpi.h                | 3 +++
 src/cpu/amd/car/post_cache_as_ram.c             | 1 +
 src/mainboard/amd/olivehill/romstage.c          | 1 +
 src/mainboard/amd/parmer/romstage.c             | 1 +
 src/mainboard/amd/persimmon/romstage.c          | 1 +
 src/mainboard/amd/thatcher/romstage.c           | 1 +
 src/mainboard/asrock/imb-a180/romstage.c        | 1 +
 src/mainboard/asus/f2a85-m/romstage.c           | 1 +
 src/mainboard/gizmosphere/gizmo/romstage.c      | 1 +
 src/mainboard/hp/pavilion_m6_1035dx/romstage.c  | 1 +
 src/mainboard/jetway/nf81-t56n-lf/romstage.c    | 1 +
 src/mainboard/lippert/frontrunner-af/romstage.c | 1 +
 src/mainboard/lippert/toucan-af/romstage.c      | 1 +
 src/mainboard/via/epia-m700/romstage.c          | 1 +
 src/northbridge/amd/amdk8/raminit.c             | 1 +
 src/southbridge/amd/agesa/hudson/hudson.h       | 2 --
 src/southbridge/amd/cimx/sb800/sb_cimx.h        | 2 --
 src/southbridge/amd/sb700/early_setup.c         | 2 +-
 src/southbridge/amd/sb700/sb700.h               | 4 ----
 src/southbridge/amd/sb800/early_setup.c         | 3 ++-
 src/southbridge/via/vt8237r/early_smbus.c       | 6 +++++-
 21 files changed, 25 insertions(+), 11 deletions(-)

diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index 362e1c0..226957d 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -560,6 +560,8 @@ extern u8 acpi_slp_type;
 
 int acpi_is_wakeup(void);
 int acpi_is_wakeup_s3(void);
+int acpi_is_wakeup_early(void);
+
 void acpi_fail_wakeup(void);
 void acpi_resume(void *wake_vec);
 void __attribute__((weak)) mainboard_suspend_resume(void);
@@ -591,6 +593,7 @@ static inline int acpi_s3_resume_allowed(void)
 #define acpi_slp_type 0
 static inline int acpi_is_wakeup(void) { return 0; }
 static inline int acpi_is_wakeup_s3(void) { return 0; }
+static inline int acpi_is_wakeup_early(void) { return 0; }
 #endif
 
 #endif  /* __ASM_ACPI_H */
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 51caec5..3a0763a 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -6,6 +6,7 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/car.h>
+#include <arch/acpi.h>
 #include "cbmem.h"
 #include "cpu/amd/car/disable_cache_as_ram.c"
 
diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c
index 73cd40a..8d2156e 100644
--- a/src/mainboard/amd/olivehill/romstage.c
+++ b/src/mainboard/amd/olivehill/romstage.c
@@ -21,6 +21,7 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/stages.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c
index 668dfc8..36a6b8a 100644
--- a/src/mainboard/amd/parmer/romstage.c
+++ b/src/mainboard/amd/parmer/romstage.c
@@ -21,6 +21,7 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/stages.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c
index 9ba34e7..5908421 100644
--- a/src/mainboard/amd/persimmon/romstage.c
+++ b/src/mainboard/amd/persimmon/romstage.c
@@ -21,6 +21,7 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/stages.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c
index 1a7a399..1461c4c 100644
--- a/src/mainboard/amd/thatcher/romstage.c
+++ b/src/mainboard/amd/thatcher/romstage.c
@@ -21,6 +21,7 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/stages.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c
index 8ce496b..382ad5b 100644
--- a/src/mainboard/asrock/imb-a180/romstage.c
+++ b/src/mainboard/asrock/imb-a180/romstage.c
@@ -21,6 +21,7 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/stages.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index 3884e36..03f4bb1 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -20,6 +20,7 @@
 
 #include "agesawrapper.h"
 
+#include <arch/acpi.h>
 #include <arch/cpu.h>
 #include <arch/io.h>
 #include <arch/stages.h>
diff --git a/src/mainboard/gizmosphere/gizmo/romstage.c b/src/mainboard/gizmosphere/gizmo/romstage.c
index 11ae623..63a2be8 100755
--- a/src/mainboard/gizmosphere/gizmo/romstage.c
+++ b/src/mainboard/gizmosphere/gizmo/romstage.c
@@ -22,6 +22,7 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/stages.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
index 2be2bc5..cb4268c 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
@@ -19,6 +19,7 @@
 
 #include "agesawrapper.h"
 
+#include <arch/acpi.h>
 #include <arch/cpu.h>
 #include <arch/io.h>
 #include <arch/stages.h>
diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
index bfd24cb..25459d7 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
@@ -20,6 +20,7 @@
 
 #include "agesawrapper.h"
 
+#include <arch/acpi.h>
 #include <arch/cpu.h>
 #include <arch/io.h>
 #include <arch/stages.h>
diff --git a/src/mainboard/lippert/frontrunner-af/romstage.c b/src/mainboard/lippert/frontrunner-af/romstage.c
index 7146c01..7945883 100644
--- a/src/mainboard/lippert/frontrunner-af/romstage.c
+++ b/src/mainboard/lippert/frontrunner-af/romstage.c
@@ -21,6 +21,7 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/stages.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/lippert/toucan-af/romstage.c b/src/mainboard/lippert/toucan-af/romstage.c
index accf381..b8bd744 100644
--- a/src/mainboard/lippert/toucan-af/romstage.c
+++ b/src/mainboard/lippert/toucan-af/romstage.c
@@ -21,6 +21,7 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/stages.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index ef0cef3..e01fd4b 100644
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -27,6 +27,7 @@
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <arch/acpi.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
 #include <arch/hlt.h>
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index 25eb007..7e42e94 100644
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -8,6 +8,7 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/mtrr.h>
 #include <stdlib.h>
+#include <arch/acpi.h>
 #include <reset.h>
 #include "raminit.h"
 #include "amdk8.h"
diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h
index 50f1738..f67af05 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.h
+++ b/src/southbridge/amd/agesa/hudson/hudson.h
@@ -70,8 +70,6 @@ void hudson_clk_output_48Mhz(void);
 int s3_save_nvram_early(u32 dword, int size, int  nvram_pos);
 int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
 
-int acpi_is_wakeup_early(void);
-
 #else
 void hudson_enable(device_t dev);
 void __attribute__((weak)) hudson_setup_sata_phys(struct device *dev);
diff --git a/src/southbridge/amd/cimx/sb800/sb_cimx.h b/src/southbridge/amd/cimx/sb800/sb_cimx.h
index 6267e1c..cd8c42b 100644
--- a/src/southbridge/amd/cimx/sb800/sb_cimx.h
+++ b/src/southbridge/amd/cimx/sb800/sb_cimx.h
@@ -32,8 +32,6 @@ void sb_Late_Post(void);
 void sb_Before_Pci_Restore_Init(void);
 void sb_After_Pci_Restore_Init(void);
 
-int acpi_is_wakeup_early(void);
-
 /**
  * CIMX not set the clock to 48Mhz until sbBeforePciInit,
  * coreboot may need to set this even more earlier
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index ddba1a8..b7a5e77 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -21,13 +21,13 @@
 #define _SB700_EARLY_SETUP_C_
 
 #include <stdint.h>
+#include <arch/acpi.h>
 #include <arch/cpu.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 
 #include <reset.h>
-#include <arch/cpu.h>
 #include <cbmem.h>
 #include "sb700.h"
 #include "smbus.h"
diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h
index b70e395..2cbfdc9 100644
--- a/src/southbridge/amd/sb700/sb700.h
+++ b/src/southbridge/amd/sb700/sb700.h
@@ -75,10 +75,6 @@ void sb7xx_51xx_setup_sata_phys(struct device *dev);
 
 #endif
 
-#if CONFIG_HAVE_ACPI_RESUME
-int acpi_is_wakeup_early(void);
-#endif
-
 int s3_save_nvram_early(u32 dword, int size, int  nvram_pos);
 int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
 
diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c
index 213cae9..ef0548c 100644
--- a/src/southbridge/amd/sb800/early_setup.c
+++ b/src/southbridge/amd/sb800/early_setup.c
@@ -21,6 +21,7 @@
 #define  _SB800_EARLY_SETUP_C_
 
 #include <reset.h>
+#include <arch/acpi.h>
 #include <arch/cpu.h>
 #include <cbmem.h>
 #include "sb800.h"
@@ -666,7 +667,7 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
 }
 
 #if CONFIG_HAVE_ACPI_RESUME
-static int acpi_is_wakeup_early(void)
+int acpi_is_wakeup_early(void)
 {
 	u16 tmp;
 	tmp = inw(ACPI_PM1_CNT_BLK);
diff --git a/src/southbridge/via/vt8237r/early_smbus.c b/src/southbridge/via/vt8237r/early_smbus.c
index b41e1ad..0223500 100644
--- a/src/southbridge/via/vt8237r/early_smbus.c
+++ b/src/southbridge/via/vt8237r/early_smbus.c
@@ -19,6 +19,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#if !defined(__ROMCC__)
+#include <arch/acpi.h>
+#endif
 #include <device/pci_ids.h>
 #include <spd.h>
 #include <stdlib.h>
@@ -328,7 +331,8 @@ void enable_rom_decode(void)
 }
 
 #if CONFIG_HAVE_ACPI_RESUME
-static int acpi_is_wakeup_early(void) {
+int acpi_is_wakeup_early(void)
+{
 	device_t dev;
 	u16 tmp;
 



More information about the coreboot-gerrit mailing list