[coreboot-gerrit] Patch set updated for coreboot: 64cbbc2 Declare acpi_is_wakeup_early() only once

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Fri Jun 20 17:20:31 CEST 2014


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4525

-gerrit

commit 64cbbc21df7df3f609fb85db6529e0a4352d91ed
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Dec 10 09:03:17 2013 +0200

    Declare acpi_is_wakeup_early() only once
    
    Follow-up patches will unify this and acpi_get_sleep_type() and
    other acpi_is_wakeup() variants.
    
    Change-Id: I5314d76168c40a6327d4a9ac3b4f4fb05497d6fc
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/include/arch/acpi.h          | 3 +++
 src/cpu/amd/car/post_cache_as_ram.c       | 1 +
 src/mainboard/via/epia-m700/romstage.c    | 1 +
 src/northbridge/amd/amdk8/raminit.c       | 1 +
 src/southbridge/amd/agesa/hudson/hudson.h | 2 --
 src/southbridge/amd/cimx/sb800/sb_cimx.h  | 2 --
 src/southbridge/amd/sb700/early_setup.c   | 2 +-
 src/southbridge/amd/sb700/sb700.h         | 4 ----
 src/southbridge/amd/sb800/early_setup.c   | 3 ++-
 src/southbridge/via/vt8237r/early_smbus.c | 4 +++-
 10 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index 362e1c0..226957d 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -560,6 +560,8 @@ extern u8 acpi_slp_type;
 
 int acpi_is_wakeup(void);
 int acpi_is_wakeup_s3(void);
+int acpi_is_wakeup_early(void);
+
 void acpi_fail_wakeup(void);
 void acpi_resume(void *wake_vec);
 void __attribute__((weak)) mainboard_suspend_resume(void);
@@ -591,6 +593,7 @@ static inline int acpi_s3_resume_allowed(void)
 #define acpi_slp_type 0
 static inline int acpi_is_wakeup(void) { return 0; }
 static inline int acpi_is_wakeup_s3(void) { return 0; }
+static inline int acpi_is_wakeup_early(void) { return 0; }
 #endif
 
 #endif  /* __ASM_ACPI_H */
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 51caec5..3a0763a 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -6,6 +6,7 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/car.h>
+#include <arch/acpi.h>
 #include "cbmem.h"
 #include "cpu/amd/car/disable_cache_as_ram.c"
 
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index ef0cef3..a09ec04 100644
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -28,6 +28,7 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
+#include <arch/acpi.h>
 #include <device/pnp_def.h>
 #include <arch/hlt.h>
 #include <console/console.h>
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index 25eb007..7e42e94 100644
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -8,6 +8,7 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/mtrr.h>
 #include <stdlib.h>
+#include <arch/acpi.h>
 #include <reset.h>
 #include "raminit.h"
 #include "amdk8.h"
diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h
index 50f1738..f67af05 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.h
+++ b/src/southbridge/amd/agesa/hudson/hudson.h
@@ -70,8 +70,6 @@ void hudson_clk_output_48Mhz(void);
 int s3_save_nvram_early(u32 dword, int size, int  nvram_pos);
 int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
 
-int acpi_is_wakeup_early(void);
-
 #else
 void hudson_enable(device_t dev);
 void __attribute__((weak)) hudson_setup_sata_phys(struct device *dev);
diff --git a/src/southbridge/amd/cimx/sb800/sb_cimx.h b/src/southbridge/amd/cimx/sb800/sb_cimx.h
index 6267e1c..cd8c42b 100644
--- a/src/southbridge/amd/cimx/sb800/sb_cimx.h
+++ b/src/southbridge/amd/cimx/sb800/sb_cimx.h
@@ -32,8 +32,6 @@ void sb_Late_Post(void);
 void sb_Before_Pci_Restore_Init(void);
 void sb_After_Pci_Restore_Init(void);
 
-int acpi_is_wakeup_early(void);
-
 /**
  * CIMX not set the clock to 48Mhz until sbBeforePciInit,
  * coreboot may need to set this even more earlier
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index ddba1a8..8ecf04d 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -22,12 +22,12 @@
 
 #include <stdint.h>
 #include <arch/cpu.h>
+#include <arch/acpi.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 
 #include <reset.h>
-#include <arch/cpu.h>
 #include <cbmem.h>
 #include "sb700.h"
 #include "smbus.h"
diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h
index b70e395..2cbfdc9 100644
--- a/src/southbridge/amd/sb700/sb700.h
+++ b/src/southbridge/amd/sb700/sb700.h
@@ -75,10 +75,6 @@ void sb7xx_51xx_setup_sata_phys(struct device *dev);
 
 #endif
 
-#if CONFIG_HAVE_ACPI_RESUME
-int acpi_is_wakeup_early(void);
-#endif
-
 int s3_save_nvram_early(u32 dword, int size, int  nvram_pos);
 int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
 
diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c
index 213cae9..2c12b39 100644
--- a/src/southbridge/amd/sb800/early_setup.c
+++ b/src/southbridge/amd/sb800/early_setup.c
@@ -22,6 +22,7 @@
 
 #include <reset.h>
 #include <arch/cpu.h>
+#include <arch/acpi.h>
 #include <cbmem.h>
 #include "sb800.h"
 #include "smbus.c"
@@ -666,7 +667,7 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
 }
 
 #if CONFIG_HAVE_ACPI_RESUME
-static int acpi_is_wakeup_early(void)
+int acpi_is_wakeup_early(void)
 {
 	u16 tmp;
 	tmp = inw(ACPI_PM1_CNT_BLK);
diff --git a/src/southbridge/via/vt8237r/early_smbus.c b/src/southbridge/via/vt8237r/early_smbus.c
index b41e1ad..98a1eb5 100644
--- a/src/southbridge/via/vt8237r/early_smbus.c
+++ b/src/southbridge/via/vt8237r/early_smbus.c
@@ -20,6 +20,7 @@
  */
 
 #include <device/pci_ids.h>
+#include <arch/acpi.h>
 #include <spd.h>
 #include <stdlib.h>
 #include "vt8237r.h"
@@ -328,7 +329,8 @@ void enable_rom_decode(void)
 }
 
 #if CONFIG_HAVE_ACPI_RESUME
-static int acpi_is_wakeup_early(void) {
+int acpi_is_wakeup_early(void)
+{
 	device_t dev;
 	u16 tmp;
 



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