[coreboot-gerrit] Patch set updated for coreboot: c7de851 panther: Set default interrupt value for Environmental Controller

Patrick Georgi (patrick@georgi-clan.de) gerrit at coreboot.org
Sat Jun 14 23:21:31 CEST 2014


Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5994

-gerrit

commit c7de851b57151495df24f6e4950377914af12b82
Author: Mohammed Habibulla <moch at chromium.org>
Date:   Wed Nov 20 16:24:58 2013 -0800

    panther: Set default interrupt value for Environmental Controller
    
    This writes the default value to the register, but it gets rid of
    the error that disturbs some of our tests:
    
    ERROR: PNP: 002e.4 70 irq size: 0x0000000001 not assigned
    (panther port of Ieab1c776b553c996a7d06e4059110943aaf41338)
    
    BRANCH=none
    BUG=chrome-os-partner:23945
    TEST=boot test on Panther
    
    Change-Id: Id45c3bdc0d2feaf6f75d984c41d1f6ffef592d4d
    Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
    Reviewed-on: https://chromium-review.googlesource.com/177468
    Reviewed-by: Stefan Reinauer <reinauer at chromium.org>
    Commit-Queue: Mohammed Habibulla <moch at google.com>
    Tested-by: Mohammed Habibulla <moch at google.com>
---
 src/mainboard/google/panther/devicetree.cb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mainboard/google/panther/devicetree.cb b/src/mainboard/google/panther/devicetree.cb
index 8bce691..1966a30 100644
--- a/src/mainboard/google/panther/devicetree.cb
+++ b/src/mainboard/google/panther/devicetree.cb
@@ -110,6 +110,7 @@ chip northbridge/intel/haswell
 					device pnp 2e.4 on # Environment Controller
 						io 0x60 = 0x700
 						io 0x62 = 0x710
+						irq 0x70 = 0x09
 						irq 0xfa = 0x12
 					end
 					device pnp 2e.7 on # GPIO



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