[coreboot-gerrit] Patch set updated for coreboot: 51a96cd CIMx/SB800: Make initialization messages more consistent
Mike Loptien (mike.loptien@se-eng.com)
gerrit at coreboot.org
Mon Jun 9 19:22:40 CEST 2014
Mike Loptien (mike.loptien at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5951
-gerrit
commit 51a96cd0fc1f27c206cc154418808e482a5fbcc7
Author: Mike Loptien <mike.loptien at se-eng.com>
Date: Fri Jun 6 15:25:44 2014 -0600
CIMx/SB800: Make initialization messages more consistent
The messaging in the SB800 late.c initialization was very
inconsistent. Making this more consistent makes it easier
to trace where the initialization routine is.
Change-Id: Iab33118ba8d9138b48ecbb2ae0b7eb8ba4d486d1
Signed-off-by: Mike Loptien <mike.loptien at se-eng.com>
---
src/southbridge/amd/cimx/sb800/late.c | 28 ++++++++++++++++++++--------
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 4352a2f..a68a9b5 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -341,10 +341,10 @@ static void sb800_enable(device_t dev)
struct southbridge_amd_cimx_sb800_config *sb_chip =
(struct southbridge_amd_cimx_sb800_config *)(dev->chip_info);
- printk(BIOS_DEBUG, "sb800_enable() ");
-
+ printk(BIOS_SPEW, "%s: Enabling ", __func__);
switch (dev->path.pci.devfn) {
case (0x11 << 3) | 0: /* 0:11.0 SATA */
+ printk(BIOS_SPEW, "SATA: 0:11.0\n");
/* the first sb800 device */
switch (GPP_CFGMODE) { /* config the GPP PCIe ports */
case GPP_CFGMODE_X2200:
@@ -375,7 +375,7 @@ static void sb800_enable(device_t dev)
break;
case (0x14 << 3) | 0: /* 0:14:0 SMBUS */
- printk(BIOS_INFO, "sm_init().\n");
+ printk(BIOS_SPEW, "SMBUS: 0:14.0\n");
/* Write PCI_INTR table */
write_pci_int_table();
@@ -402,22 +402,24 @@ static void sb800_enable(device_t dev)
break;
case (0x14 << 3) | 1: /* 0:14:1 IDE */
+ printk(BIOS_SPEW, "IDE: 0:14.1\n");
break;
case (0x14 << 3) | 2: /* 0:14:2 HDA */
+ printk(BIOS_SPEW, "HDA: 0:14.2\n");
if (dev->enabled) {
if (AZALIA_DISABLE == sb_config->AzaliaController) {
sb_config->AzaliaController = AZALIA_AUTO;
}
- printk(BIOS_DEBUG, "hda enabled\n");
+ printk(BIOS_DEBUG, "\thda enabled\n");
} else {
sb_config->AzaliaController = AZALIA_DISABLE;
- printk(BIOS_DEBUG, "hda disabled\n");
+ printk(BIOS_DEBUG, "\thda disabled\n");
}
break;
-
case (0x14 << 3) | 3: /* 0:14:3 LPC */
+ printk(BIOS_SPEW, "LPC: 0:14.3\n");
/* Initialize the fans */
#if CONFIG_SB800_IMC_FAN_CONTROL
init_sb800_IMC_fans(dev);
@@ -427,19 +429,22 @@ static void sb800_enable(device_t dev)
break;
case (0x14 << 3) | 4: /* 0:14:4 PCI */
+ printk(BIOS_SPEW, "PCI Bridge: 0:14.4\n");
break;
case (0x14 << 3) | 6: /* 0:14:6 GEC */
+ printk(BIOS_SPEW, "GEC: 0:14.6\n");
if (dev->enabled) {
sb_config->GecConfig = 0;
- printk(BIOS_DEBUG, "gec enabled\n");
+ printk(BIOS_SPEW, "\tgec enabled\n");
} else {
sb_config->GecConfig = 1;
- printk(BIOS_DEBUG, "gec disabled\n");
+ printk(BIOS_SPEW, "\tgec disabled\n");
}
break;
case (0x15 << 3) | 0: /* 0:15:0 PCIe PortA */
+ printk(BIOS_SPEW, "PCIe PortA: 0:15.0\n");
{
device_t device;
for (device = dev; device; device = device->next) {
@@ -459,24 +464,31 @@ static void sb800_enable(device_t dev)
break;
case (0x12 << 3) | 0: /* 0:12:0 OHCI-USB1 */
+ printk(BIOS_SPEW, "USB OHCI1: 0:12.0\n");
sb_config->USBMODE.UsbMode.Ohci1 = dev->enabled;
break;
case (0x12 << 3) | 2: /* 0:12:2 EHCI-USB1 */
+ printk(BIOS_SPEW, "USB EHCI1: 0:12.2\n");
sb_config->USBMODE.UsbMode.Ehci1 = dev->enabled;
break;
case (0x13 << 3) | 0: /* 0:13:0 OHCI-USB2 */
+ printk(BIOS_SPEW, "USB OHCI2: 0:13.0\n");
sb_config->USBMODE.UsbMode.Ohci2 = dev->enabled;
break;
case (0x13 << 3) | 2: /* 0:13:2 EHCI-USB2 */
+ printk(BIOS_SPEW, "USB EHCI2: 0:13.2\n");
sb_config->USBMODE.UsbMode.Ehci2 = dev->enabled;
break;
case (0x14 << 3) | 5: /* 0:14:5 OHCI-USB4 */
+ printk(BIOS_SPEW, "USB OHCI4: 0:14.5\n");
sb_config->USBMODE.UsbMode.Ohci4 = dev->enabled;
break;
case (0x16 << 3) | 0: /* 0:16:0 OHCI-USB3 */
+ printk(BIOS_SPEW, "USB OHCI3: 0:16.0\n");
sb_config->USBMODE.UsbMode.Ohci3 = dev->enabled;
break;
case (0x16 << 3) | 2: /* 0:16:2 EHCI-USB3 */
+ printk(BIOS_SPEW, "USB EHCI3: 0:16.2\n");
sb_config->USBMODE.UsbMode.Ehci3 = dev->enabled;
/* call the CIMX entry at the last sb800 device,
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