[coreboot-gerrit] New patch to review for coreboot: beacde1 Board lenovo/t530 x230: Non-local header treated as local

HAOUAS Elyes (ehaouas@noos.fr) gerrit at coreboot.org
Sun Jun 1 15:31:35 CEST 2014


HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5908

-gerrit

commit beacde1c2d92579b2545854811706cf063f55df1
Author: Elyes <ehaouas at noos.fr>
Date:   Sun Jun 1 15:29:40 2014 +0200

    Board lenovo/t530 x230: Non-local header treated as local
    
    Change-Id: I307ca2e8b27378b7b1e2b49961c7d760d660f280
    Signed-off-by: Elyes <ehaouas at noos.fr>
---
 src/mainboard/lenovo/t530/gpio.h     | 2 +-
 src/mainboard/lenovo/t530/romstage.c | 8 ++++----
 src/mainboard/lenovo/x230/gpio.h     | 2 +-
 src/mainboard/lenovo/x230/romstage.c | 8 ++++----
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/src/mainboard/lenovo/t530/gpio.h b/src/mainboard/lenovo/t530/gpio.h
index 70e4c09..93a3113 100644
--- a/src/mainboard/lenovo/t530/gpio.h
+++ b/src/mainboard/lenovo/t530/gpio.h
@@ -21,7 +21,7 @@
 #ifndef T530_GPIO_H
 #define T530_GPIO_H
 
-#include "southbridge/intel/bd82x6x/gpio.h"
+#include <southbridge/intel/bd82x6x/gpio.h>
 
 const struct pch_gpio_set1 pch_gpio_set1_mode = {
 	.gpio0  = GPIO_MODE_GPIO,
diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c
index 96b5205..6279dc9 100644
--- a/src/mainboard/lenovo/t530/romstage.c
+++ b/src/mainboard/lenovo/t530/romstage.c
@@ -31,10 +31,10 @@
 #include <pc80/mc146818rtc.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include "northbridge/intel/sandybridge/sandybridge.h"
-#include "northbridge/intel/sandybridge/raminit.h"
-#include "southbridge/intel/bd82x6x/pch.h"
-#include "southbridge/intel/bd82x6x/gpio.h"
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/sandybridge/raminit.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+#include <southbridge/intel/bd82x6x/gpio.h>
 #include <arch/cpu.h>
 #include <cpu/x86/bist.h>
 #include <cpu/x86/msr.h>
diff --git a/src/mainboard/lenovo/x230/gpio.h b/src/mainboard/lenovo/x230/gpio.h
index f0a32a8..6aae1ce 100644
--- a/src/mainboard/lenovo/x230/gpio.h
+++ b/src/mainboard/lenovo/x230/gpio.h
@@ -21,7 +21,7 @@
 #ifndef X230_GPIO_H
 #define X230_GPIO_H
 
-#include "southbridge/intel/bd82x6x/gpio.h"
+#include <southbridge/intel/bd82x6x/gpio.h>
 
 const struct pch_gpio_set1 pch_gpio_set1_mode = {
 	.gpio0  = GPIO_MODE_GPIO,
diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c
index 6e4e685..d3266e6 100644
--- a/src/mainboard/lenovo/x230/romstage.c
+++ b/src/mainboard/lenovo/x230/romstage.c
@@ -31,10 +31,10 @@
 #include <pc80/mc146818rtc.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include "northbridge/intel/sandybridge/sandybridge.h"
-#include "northbridge/intel/sandybridge/raminit.h"
-#include "southbridge/intel/bd82x6x/pch.h"
-#include "southbridge/intel/bd82x6x/gpio.h"
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/sandybridge/raminit.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+#include <southbridge/intel/bd82x6x/gpio.h>
 #include <arch/cpu.h>
 #include <cpu/x86/bist.h>
 #include <cpu/x86/msr.h>



More information about the coreboot-gerrit mailing list