[coreboot-gerrit] New patch to review for coreboot: cb4b933 supermicro/h8qgi & h8scm: Remove a trailing whitespace
HAOUAS Elyes (ehaouas@noos.fr)
gerrit at coreboot.org
Tue Jul 22 19:03:02 CEST 2014
HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6324
-gerrit
commit cb4b93305ac006372478879fc2c5bc31bc66111f
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date: Tue Jul 22 19:03:14 2014 +0200
supermicro/h8qgi & h8scm: Remove a trailing whitespace
Change-Id: I9d44679f32b917dae42b9a6920c3d3c54626dcda
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
src/mainboard/supermicro/h8qgi/buildOpts.c | 18 +++++++++---------
src/mainboard/supermicro/h8qgi/platform_cfg.h | 4 ++--
src/mainboard/supermicro/h8scm/buildOpts.c | 18 +++++++++---------
src/mainboard/supermicro/h8scm/platform_cfg.h | 4 ++--
4 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/src/mainboard/supermicro/h8qgi/buildOpts.c b/src/mainboard/supermicro/h8qgi/buildOpts.c
index 1a1181e..40dbc57 100644
--- a/src/mainboard/supermicro/h8qgi/buildOpts.c
+++ b/src/mainboard/supermicro/h8qgi/buildOpts.c
@@ -30,15 +30,15 @@
* coreboot enable -Wundef option, so we should make sure we have all contanstand defined
*/
/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY 200 ///< DDR 400
-#define DDR533_FREQUENCY 266 ///< DDR 533
-#define DDR667_FREQUENCY 333 ///< DDR 667
-#define DDR800_FREQUENCY 400 ///< DDR 800
-#define DDR1066_FREQUENCY 533 ///< DDR 1066
-#define DDR1333_FREQUENCY 667 ///< DDR 1333
-#define DDR1600_FREQUENCY 800 ///< DDR 1600
-#define DDR1866_FREQUENCY 933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
+#define DDR400_FREQUENCY 200 ///< DDR 400
+#define DDR533_FREQUENCY 266 ///< DDR 533
+#define DDR667_FREQUENCY 333 ///< DDR 667
+#define DDR800_FREQUENCY 400 ///< DDR 800
+#define DDR1066_FREQUENCY 533 ///< DDR 1066
+#define DDR1333_FREQUENCY 667 ///< DDR 1333
+#define DDR1600_FREQUENCY 800 ///< DDR 1600
+#define DDR1866_FREQUENCY 933 ///< DDR 1866
+#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
diff --git a/src/mainboard/supermicro/h8qgi/platform_cfg.h b/src/mainboard/supermicro/h8qgi/platform_cfg.h
index 1663685..2569680 100644
--- a/src/mainboard/supermicro/h8qgi/platform_cfg.h
+++ b/src/mainboard/supermicro/h8qgi/platform_cfg.h
@@ -31,13 +31,13 @@
* Enable check for PCIe endpoint to be ready for PCI enumeration.
*
*/
-//#define EPREADY_WORKAROUND_DISABLED
+//#define EPREADY_WORKAROUND_DISABLED
/**
* Enable IOMMU support. Initialize IOMMU subsystem, generate IVRS ACPI table.
*
*/
-#define IOMMU_SUPPORT_DISABLE //TODO: enable it
+#define IOMMU_SUPPORT_DISABLE //TODO: enable it
/**
* Disable server PCIe hotplug support.
diff --git a/src/mainboard/supermicro/h8scm/buildOpts.c b/src/mainboard/supermicro/h8scm/buildOpts.c
index 543bc4f..95dffaa 100644
--- a/src/mainboard/supermicro/h8scm/buildOpts.c
+++ b/src/mainboard/supermicro/h8scm/buildOpts.c
@@ -30,15 +30,15 @@
* coreboot enable -Wundef option, so we should make sure we have all contanstand defined
*/
/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY 200 ///< DDR 400
-#define DDR533_FREQUENCY 266 ///< DDR 533
-#define DDR667_FREQUENCY 333 ///< DDR 667
-#define DDR800_FREQUENCY 400 ///< DDR 800
-#define DDR1066_FREQUENCY 533 ///< DDR 1066
-#define DDR1333_FREQUENCY 667 ///< DDR 1333
-#define DDR1600_FREQUENCY 800 ///< DDR 1600
-#define DDR1866_FREQUENCY 933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
+#define DDR400_FREQUENCY 200 ///< DDR 400
+#define DDR533_FREQUENCY 266 ///< DDR 533
+#define DDR667_FREQUENCY 333 ///< DDR 667
+#define DDR800_FREQUENCY 400 ///< DDR 800
+#define DDR1066_FREQUENCY 533 ///< DDR 1066
+#define DDR1333_FREQUENCY 667 ///< DDR 1333
+#define DDR1600_FREQUENCY 800 ///< DDR 1600
+#define DDR1866_FREQUENCY 933 ///< DDR 1866
+#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
diff --git a/src/mainboard/supermicro/h8scm/platform_cfg.h b/src/mainboard/supermicro/h8scm/platform_cfg.h
index 1663685..2569680 100644
--- a/src/mainboard/supermicro/h8scm/platform_cfg.h
+++ b/src/mainboard/supermicro/h8scm/platform_cfg.h
@@ -31,13 +31,13 @@
* Enable check for PCIe endpoint to be ready for PCI enumeration.
*
*/
-//#define EPREADY_WORKAROUND_DISABLED
+//#define EPREADY_WORKAROUND_DISABLED
/**
* Enable IOMMU support. Initialize IOMMU subsystem, generate IVRS ACPI table.
*
*/
-#define IOMMU_SUPPORT_DISABLE //TODO: enable it
+#define IOMMU_SUPPORT_DISABLE //TODO: enable it
/**
* Disable server PCIe hotplug support.
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