[coreboot-gerrit] Patch set updated for coreboot: eef7090 Fix romstage dev type, 'device_t' -> 'pci_devfn_t' in get_sbdn()
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Sat Jul 19 12:05:21 CEST 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6226
-gerrit
commit eef70901e56aa59d777cc4b59d8f825fba1358fc
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Wed Jul 9 05:22:32 2014 +1000
Fix romstage dev type, 'device_t' -> 'pci_devfn_t' in get_sbdn()
Unfortunately coreboot has to deal with ROMCC's short comings which has
lead to a little bit of confusion due to typedefs. Essentially, coreboot
defines four typedefs:
* 'typedef struct device * device_t' in ramstage not in SIMPLE_DEVICE mode
* 'typedef u32 device_t' in romstage or when SIMPLE_DEVICE is defined
* 'typedef u32 pnp_devfn_t'
* 'typedef u32 pci_devfn_t'
Some early functions make use of 'device_t' over 'pci_devfn_t' and since
the C type-checker does not enforce typedefs to the same type 'u32'
these are never noticed. Fix these so that 'device_t' does not conflict
in romstage for later work. We later plan to have 'pnp_devfn_t' and
'pci_devfn_t' as the only variants of 'u32' and 'device_t' to be a
struct pointer type exclusively.
Change-Id: Ied3940d9b2ec119ca4b75b955305add59edbbb18
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/mainboard/asus/a8v-e_deluxe/romstage.c | 2 +-
src/mainboard/asus/a8v-e_se/romstage.c | 2 +-
src/mainboard/asus/f2a85-m/romstage.c | 2 +-
src/mainboard/asus/k8v-x/romstage.c | 2 +-
src/mainboard/asus/m2v-mx_se/romstage.c | 2 +-
src/mainboard/asus/m2v/romstage.c | 2 +-
src/southbridge/amd/cimx/sb700/early.c | 6 +++---
src/southbridge/amd/cimx/sb800/early.c | 2 +-
src/southbridge/amd/sb600/early_setup.c | 2 +-
src/southbridge/amd/sb700/early_setup.c | 2 +-
src/southbridge/broadcom/bcm5785/early_setup.c | 2 +-
src/southbridge/nvidia/mcp55/early_ctrl.c | 2 +-
src/southbridge/sis/sis966/early_ctrl.c | 2 +-
13 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c
index 1dea57b..9604816 100644
--- a/src/mainboard/asus/a8v-e_deluxe/romstage.c
+++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c
@@ -90,7 +90,7 @@ void soft_reset(void)
unsigned int get_sbdn(unsigned bus)
{
- device_t dev;
+ pci_devfn_t dev;
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237R_LPC), bus);
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index abe5f84..1261293 100644
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -90,7 +90,7 @@ void soft_reset(void)
unsigned int get_sbdn(unsigned bus)
{
- device_t dev;
+ pci_devfn_t dev;
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237R_LPC), bus);
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index 71455fd..cafadb6 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -67,7 +67,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
u8 byte;
- device_t dev;
+ pci_devfn_t dev;
#if IS_ENABLED(CONFIG_POST_DEVICE_PCI_PCIE)
hudson_pci_port80();
diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c
index 4d6bd60..e4b9c6b 100644
--- a/src/mainboard/asus/k8v-x/romstage.c
+++ b/src/mainboard/asus/k8v-x/romstage.c
@@ -88,7 +88,7 @@ void soft_reset(void)
unsigned int get_sbdn(unsigned bus)
{
- device_t dev;
+ pci_devfn_t dev;
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237R_LPC), bus);
diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index d374828..6e113c0 100644
--- a/src/mainboard/asus/m2v-mx_se/romstage.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -107,7 +107,7 @@ void soft_reset(void)
unsigned int get_sbdn(unsigned bus)
{
- device_t dev;
+ pci_devfn_t dev;
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237R_LPC), bus);
diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c
index a2c6a03..94b1251 100644
--- a/src/mainboard/asus/m2v/romstage.c
+++ b/src/mainboard/asus/m2v/romstage.c
@@ -91,7 +91,7 @@ void soft_reset(void)
unsigned int get_sbdn(unsigned bus)
{
- device_t dev;
+ pci_devfn_t dev;
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237R_LPC), bus);
diff --git a/src/southbridge/amd/cimx/sb700/early.c b/src/southbridge/amd/cimx/sb700/early.c
index 6dc4ff4..b606352 100644
--- a/src/southbridge/amd/cimx/sb700/early.c
+++ b/src/southbridge/amd/cimx/sb700/early.c
@@ -34,7 +34,7 @@
*/
u32 get_sbdn(u32 bus)
{
- device_t dev;
+ pci_devfn_t dev;
printk(BIOS_SPEW, "SB700 - Early.c - %s - Start.\n", __func__);
dev = pci_locate_device_on_bus(
@@ -69,7 +69,7 @@ void sb_Poweron_Init(void)
void sb7xx_51xx_enable_wideio(u8 wio_index, u16 base)
{
/* TODO: Now assume wio_index=0 */
- device_t dev;
+ pci_devfn_t dev;
u8 reg8;
//dev = pci_locate_device(PCI_ID(0x1002, 0x439d), 0); /* LPC Controller */
@@ -83,7 +83,7 @@ void sb7xx_51xx_enable_wideio(u8 wio_index, u16 base)
void sb7xx_51xx_disable_wideio(u8 wio_index)
{
/* TODO: Now assume wio_index=0 */
- device_t dev;
+ pci_devfn_t dev;
u8 reg8;
//dev = pci_locate_device(PCI_ID(0x1002, 0x439d), 0); /* LPC Controller */
diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c
index 40648ed..0341567 100644
--- a/src/southbridge/amd/cimx/sb800/early.c
+++ b/src/southbridge/amd/cimx/sb800/early.c
@@ -33,7 +33,7 @@
*/
u32 get_sbdn(u32 bus)
{
- device_t dev;
+ pci_devfn_t dev;
printk(BIOS_DEBUG, "SB800 - %s - %s - Start.\n", __FILE__, __func__);
//dev = PCI_DEV(bus, 0x14, 0);
diff --git a/src/southbridge/amd/sb600/early_setup.c b/src/southbridge/amd/sb600/early_setup.c
index b6611f6..6797399 100644
--- a/src/southbridge/amd/sb600/early_setup.c
+++ b/src/southbridge/amd/sb600/early_setup.c
@@ -106,7 +106,7 @@ static void sb600_lpc_init(void)
/* what is its usage? */
static u32 get_sbdn(u32 bus)
{
- device_t dev;
+ pci_devfn_t dev;
/* Find the device. */
dev = pci_locate_device_on_bus(PCI_ID(0x1002, 0x4385), bus);
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index b7a5e77..7208146 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -221,7 +221,7 @@ void sb7xx_51xx_disable_wideio(u8 wio_index)
/* what is its usage? */
u32 __attribute__ ((weak)) get_sbdn(u32 bus)
{
- device_t dev;
+ pci_devfn_t dev;
/* Find the device. */
dev = pci_locate_device_on_bus(PCI_ID(0x1002, 0x4385), bus);
diff --git a/src/southbridge/broadcom/bcm5785/early_setup.c b/src/southbridge/broadcom/bcm5785/early_setup.c
index 9dee295..0a69e5e 100644
--- a/src/southbridge/broadcom/bcm5785/early_setup.c
+++ b/src/southbridge/broadcom/bcm5785/early_setup.c
@@ -69,7 +69,7 @@ static void bcm5785_enable_wdt_port_cf9(void)
unsigned get_sbdn(unsigned bus)
{
- device_t dev;
+ pci_devfn_t dev;
/* Find the device.
* There can only be one bcm5785 on a hypertransport chain/bus.
diff --git a/src/southbridge/nvidia/mcp55/early_ctrl.c b/src/southbridge/nvidia/mcp55/early_ctrl.c
index 92f9d03..865c023 100644
--- a/src/southbridge/nvidia/mcp55/early_ctrl.c
+++ b/src/southbridge/nvidia/mcp55/early_ctrl.c
@@ -24,7 +24,7 @@
static unsigned get_sbdn(unsigned bus)
{
- device_t dev;
+ pci_devfn_t dev;
/* Find the device. */
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_NVIDIA,
diff --git a/src/southbridge/sis/sis966/early_ctrl.c b/src/southbridge/sis/sis966/early_ctrl.c
index 3695023..4b3a228 100644
--- a/src/southbridge/sis/sis966/early_ctrl.c
+++ b/src/southbridge/sis/sis966/early_ctrl.c
@@ -23,7 +23,7 @@
static unsigned get_sbdn(unsigned bus)
{
- device_t dev;
+ pci_devfn_t dev;
/* Find the device. */
dev = pci_locate_device_on_bus(
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