[coreboot-gerrit] New patch to review for coreboot: 2f426ff soc, Makefile.inc: Trivial - drop trailing blank lines at EOF

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6284

-gerrit

commit 2f426ff7d63518a0937884f2261f115f8b28116a
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Wed Jul 16 19:02:20 2014 +1000

    soc,Makefile.inc: Trivial - drop trailing blank lines at EOF
    
    Change-Id: I6db4eada5be5f9a4340d9edb942924e2fd18b5ca
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/soc/intel/fsp_baytrail/Makefile.inc     | 1 -
 src/soc/intel/fsp_baytrail/fsp/Makefile.inc | 1 -
 2 files changed, 2 deletions(-)

diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc
index e0f1e1d..598deb4 100644
--- a/src/soc/intel/fsp_baytrail/Makefile.inc
+++ b/src/soc/intel/fsp_baytrail/Makefile.inc
@@ -87,4 +87,3 @@ endif
 
 endif
 endif
-
diff --git a/src/soc/intel/fsp_baytrail/fsp/Makefile.inc b/src/soc/intel/fsp_baytrail/fsp/Makefile.inc
index ebdc80a..05620ae 100644
--- a/src/soc/intel/fsp_baytrail/fsp/Makefile.inc
+++ b/src/soc/intel/fsp_baytrail/fsp/Makefile.inc
@@ -19,4 +19,3 @@
 
 ramstage-y += chipset_fsp_util.c
 romstage-y += chipset_fsp_util.c
-