[coreboot-gerrit] Patch set updated for coreboot: 06600d8 google/panther: Make sure the S5 power status is on track

Paul Menzel (paulepanter@users.sourceforge.net) gerrit at coreboot.org
Sun Jul 6 00:31:46 CEST 2014


Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5993

-gerrit

commit 06600d8966917d327364ada83b3cc9528403d029
Author: Mohammed Habibulla <moch at chromium.org>
Date:   Tue Nov 12 13:29:43 2013 -0800

    google/panther: Make sure the S5 power status is on track
    
    (panther port of I933c475f693b0271f86b5166eb2c9b3873f1c2c6)
    
    BUG=none
    BRANCH=none
    TEST=boot test on panther
    
    Change-Id: I5958a8d701901706eaa38df4323120c8352fea5c
    Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-on: https://chromium-review.googlesource.com/176563
    Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
    Commit-Queue: Mohammed Habibulla <moch at chromium.org>
    Tested-by: Mohammed Habibulla <moch at chromium.org>
---
 src/mainboard/google/panther/devicetree.cb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mainboard/google/panther/devicetree.cb b/src/mainboard/google/panther/devicetree.cb
index 39d4f06..8bce691 100644
--- a/src/mainboard/google/panther/devicetree.cb
+++ b/src/mainboard/google/panther/devicetree.cb
@@ -110,6 +110,7 @@ chip northbridge/intel/haswell
 					device pnp 2e.4 on # Environment Controller
 						io 0x60 = 0x700
 						io 0x62 = 0x710
+						irq 0xfa = 0x12
 					end
 					device pnp 2e.7 on # GPIO
 						io 0x60 = 0x720



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