[coreboot-gerrit] Patch merged into coreboot/master: 93acc4f coreboot: config to cache ramstage outside CBMEM
gerrit at coreboot.org
gerrit at coreboot.org
Thu Jan 30 06:04:09 CET 2014
the following patch was just integrated into master:
commit 93acc4f23587ea49c500026aed476fd4beb91672
Author: Aaron Durbin <adurbin at chromium.org>
Date: Thu Oct 10 20:37:04 2013 -0500
coreboot: config to cache ramstage outside CBMEM
Haswell was the original chipset to store the cache
in another area besides CBMEM. However, it was specific
to the implementation. Instead, provide a generic way
to obtain the location of the ramstage cache. This option
is selected using the CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
Kconfig option.
BUG=chrome-os-partner:23249
BRANCH=None
TEST=Built and booted with baytrail support. Also built for
falco successfully.
Change-Id: I70d0940f7a8f73640c92a75fd22588c2c234241b
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172602
Reviewed-by: Stefan Reinauer <reinauer at google.com>
See http://review.coreboot.org/4876 for details.
-gerrit
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