[coreboot-gerrit] Patch set updated for coreboot: 312a729 baytrail: allow function disable on TXE

Aaron Durbin (adurbin@google.com) gerrit at coreboot.org
Tue Jan 28 05:32:17 CET 2014


Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4925

-gerrit

commit 312a729810bdb7d3fa18d3f04760d29944f28c8e
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Oct 30 17:08:59 2013 -0500

    baytrail: allow function disable on TXE
    
    Previously it was not known how to put the TXE pci device
    into D3Hot. It's been disseminated that this is not a requirement
    for disabling the TXE pci device in the function disable register.
    Therefore, allow this by returning 0 from place_device_in_d3hot().
    
    BUG=chrome-os-partner:22871
    BRANCH=None
    TEST=Temporarily set TXE to be disabled. Noted FUNC_DIS was being
         set accordingly.
    
    Change-Id: Ibf537bf8ba718859591dc89bdf41e57c1ea9d836
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/175490
    Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/soc/intel/baytrail/southcluster.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index a3a1a22..40d135b 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -264,6 +264,8 @@ static int place_device_in_d3hot(device_t dev)
 		offset = 0x50;
 		break;
 	DEV_CASE(TXE):
+		/* TXE cannot be placed in D3Hot. */
+		return 0;
 		break;
 	DEV_CASE(PCIE_PORT1):
 	DEV_CASE(PCIE_PORT2):



More information about the coreboot-gerrit mailing list