[coreboot-gerrit] New patch to review for coreboot: 6076858 baytrail: add in C0 stepping idenitification support.
Aaron Durbin (adurbin@google.com)
gerrit at coreboot.org
Tue Jan 28 03:58:06 CET 2014
Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5062
-gerrit
commit 60768589c0916bd7a41abf570f4506d6d2d6bdcd
Author: Aaron Durbin <adurbin at chromium.org>
Date: Thu Jan 23 16:25:11 2014 -0600
baytrail: add in C0 stepping idenitification support.
The C0 cpuid's were added as well as the microcode, but we
weren't making C0 a first class citizen in the pattrs.
BUG=chrome-os-partner:24542
BRANCH=baytrail
TEST=Built and booted b3.
Change-Id: Ie23f8ce867f339eab3b55b8c5f49ab822f23eebb
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/183594
Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
src/soc/intel/baytrail/baytrail/lpc.h | 2 ++
src/soc/intel/baytrail/ramstage.c | 9 +++++++--
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/soc/intel/baytrail/baytrail/lpc.h b/src/soc/intel/baytrail/baytrail/lpc.h
index 71391ad..31de310 100644
--- a/src/soc/intel/baytrail/baytrail/lpc.h
+++ b/src/soc/intel/baytrail/baytrail/lpc.h
@@ -36,6 +36,7 @@
#define RID_A_STEPPING_START 1
#define RID_B_STEPPING_START 5
+#define RID_C_STEPPING_START 0xe
enum baytrail_stepping {
STEP_A0,
STEP_A1,
@@ -43,6 +44,7 @@ enum baytrail_stepping {
STEP_B1,
STEP_B2,
STEP_B3,
+ STEP_C0,
};
#endif /* _BAYTRAIL_LPC_H_ */
diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c
index 0cc9327..e8f441f 100644
--- a/src/soc/intel/baytrail/ramstage.c
+++ b/src/soc/intel/baytrail/ramstage.c
@@ -72,7 +72,9 @@ static inline void fill_in_msr(msr_t *msr, int idx)
}
}
-static const char *stepping_str[] = { "A0", "A1", "B0", "B1", "B2", "B3" };
+static const char *stepping_str[] = {
+ "A0", "A1", "B0", "B1", "B2", "B3", "C0"
+};
static void fill_in_pattrs(void)
{
@@ -84,7 +86,10 @@ static void fill_in_pattrs(void)
dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));
attrs->revid = pci_read_config8(dev, REVID);
/* The revision to stepping IDs have two values per metal stepping. */
- if (attrs->revid >= RID_B_STEPPING_START) {
+ if (attrs->revid >= RID_C_STEPPING_START) {
+ attrs->stepping = (attrs->revid - RID_C_STEPPING_START) / 2;
+ attrs->stepping += STEP_C0;
+ } else if (attrs->revid >= RID_B_STEPPING_START) {
attrs->stepping = (attrs->revid - RID_B_STEPPING_START) / 2;
attrs->stepping += STEP_B0;
} else {
More information about the coreboot-gerrit
mailing list