[coreboot-gerrit] New patch to review for coreboot: 6884074 rambi: enable PS2 mode for VNN and VCC

[Aaron Durbin (adurbin@google.com)]

Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5064

-gerrit

commit 68840748bdc7e1251ca05e5c4c615aeaf369174c
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Thu Jan 23 23:10:53 2014 -0600

    rambi: enable PS2 mode for VNN and VCC
    
    Enable the PS2 mode for the VNN and VCC's
    voltage regulator. It only gets enabled on
    C0 and later parts.
    
    BUG=chrome-os-partner:24542
    BRANCH=baytrail
    TEST=Built and booted b3.
    
    Change-Id: Id96b5527227ec31da1e5cd106791fe45576b063b
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/183596
---
 src/mainboard/google/rambi/devicetree.cb | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/mainboard/google/rambi/devicetree.cb b/src/mainboard/google/rambi/devicetree.cb
index fe5ec7b..15cb5ff 100644
--- a/src/mainboard/google/rambi/devicetree.cb
+++ b/src/mainboard/google/rambi/devicetree.cb
@@ -44,6 +44,10 @@ chip soc/intel/baytrail
 	register "gpu_pipea_light_off_delay" = "2000"	# 200ms
 	register "gpu_pipea_backlight_pwm" = "0x400"
 
+	# VR PS2 control
+	register "vnn_ps2_enable" = "1"
+	register "vcc_ps2_enable" = "1"
+
 	device cpu_cluster 0 on
 		device lapic 0 on end
 	end