[coreboot-gerrit] Patch set updated for coreboot: 95caec2 AMD: Add common header file for CAR setup
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Mon Jan 13 11:47:29 CET 2014
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4683
-gerrit
commit 95caec2a90f20cc613181e4bfd0c775037263c5b
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Mon Dec 30 10:11:33 2013 +0200
AMD: Add common header file for CAR setup
Change-Id: I24b2cbd671ac3a463562d284f06258140a019a37
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/cpu/amd/car/post_cache_as_ram.c | 6 +-----
src/include/cpu/amd/car.h | 18 ++++++++++++++++++
src/include/lib.h | 8 --------
src/mainboard/amd/dinar/romstage.c | 2 --
src/mainboard/amd/inagua/romstage.c | 1 +
src/mainboard/amd/olivehill/romstage.c | 3 +--
src/mainboard/amd/parmer/romstage.c | 3 +--
src/mainboard/amd/persimmon/romstage.c | 3 +--
src/mainboard/amd/south_station/romstage.c | 1 +
src/mainboard/amd/thatcher/romstage.c | 3 +--
src/mainboard/amd/torpedo/romstage.c | 2 +-
src/mainboard/amd/union_station/romstage.c | 1 +
src/mainboard/asrock/e350m1/romstage.c | 2 +-
src/mainboard/asrock/imb-a180/romstage.c | 3 +--
src/mainboard/asus/f2a85-m/romstage.c | 3 +--
src/mainboard/digitallogic/msm800sev/romstage.c | 2 +-
src/mainboard/gizmosphere/gizmo/romstage.c | 3 +--
src/mainboard/lippert/frontrunner-af/romstage.c | 3 +--
src/mainboard/lippert/toucan-af/romstage.c | 3 +--
src/mainboard/pcengines/alix1c/romstage.c | 2 +-
src/mainboard/pcengines/alix2d/romstage.c | 2 +-
src/mainboard/supermicro/h8qgi/romstage.c | 2 +-
src/mainboard/supermicro/h8scm/romstage.c | 2 +-
src/mainboard/tyan/s8226/romstage.c | 2 +-
24 files changed, 39 insertions(+), 41 deletions(-)
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 81175da..1669da7 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -5,6 +5,7 @@
#include <arch/stages.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
+#include <cpu/amd/car.h>
#include "cbmem.h"
#include "cpu/amd/car/disable_cache_as_ram.c"
@@ -75,8 +76,6 @@ static void vErrata343(void)
#endif
}
-void cache_as_ram_switch_stack(void *resume_backup_memory);
-
void post_cache_as_ram(void)
{
void *resume_backup_memory = NULL;
@@ -113,9 +112,6 @@ void post_cache_as_ram(void)
}
void
-cache_as_ram_new_stack (void *resume_backup_memory);
-
-void
cache_as_ram_new_stack (void *resume_backup_memory __attribute__ ((unused)))
{
/* We can put data to stack again */
diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h
new file mode 100644
index 0000000..4bc7a03
--- /dev/null
+++ b/src/include/cpu/amd/car.h
@@ -0,0 +1,18 @@
+#ifndef _CPU_AMD_CAR_H
+#define _CPU_AMD_CAR_H
+
+#if CONFIG_CPU_AMD_GEODE_LX
+void done_cache_as_ram_main(void);
+#endif
+
+#if !(CONFIG_CPU_AMD_GEODE_LX || CONFIG_CPU_AMD_GEODE_GX1 || CONFIG_CPU_AMD_GEODE_GX2)
+void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
+#endif
+
+#if CONFIG_CPU_AMD_MODEL_FXX || CONFIG_CPU_AMD_MODEL_10XXX
+void cache_as_ram_switch_stack(void *resume_backup_memory);
+void cache_as_ram_new_stack(void *resume_backup_memory);
+void post_cache_as_ram(void);
+#endif
+
+#endif
diff --git a/src/include/lib.h b/src/include/lib.h
index 5fc390a..4fa9425 100644
--- a/src/include/lib.h
+++ b/src/include/lib.h
@@ -48,14 +48,6 @@ int checkstack(void *top_of_stack, int core);
extern unsigned char _estack[];
#endif
-/* Defined in romstage.c */
-#if CONFIG_CPU_AMD_GEODE_LX
-void cache_as_ram_main(void);
-#else
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
-#endif
-void post_cache_as_ram(void);
-
/* Defined in src/lib/hexdump.c */
void hexdump(unsigned long memory, int length);
diff --git a/src/mainboard/amd/dinar/romstage.c b/src/mainboard/amd/dinar/romstage.c
index a124905..3438d19 100644
--- a/src/mainboard/amd/dinar/romstage.c
+++ b/src/mainboard/amd/dinar/romstage.c
@@ -40,8 +40,6 @@
#define SERIAL_DEV PNP_DEV(CONFIG_SIO_PORT, SMSCSUPERIO_SP1)
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
-void disable_cache_as_ram(void);
u32 agesawrapper_amdinitmmio (void);
u32 agesawrapper_amdinitreset (void);
diff --git a/src/mainboard/amd/inagua/romstage.c b/src/mainboard/amd/inagua/romstage.c
index 2e46516..010a1c9 100644
--- a/src/mainboard/amd/inagua/romstage.c
+++ b/src/mainboard/amd/inagua/romstage.c
@@ -29,6 +29,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "superio/smsc/kbc1100/kbc1100_early_init.c"
diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c
index 9431d4a..6422393 100644
--- a/src/mainboard/amd/olivehill/romstage.c
+++ b/src/mainboard/amd/olivehill/romstage.c
@@ -28,6 +28,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
@@ -37,8 +38,6 @@
#include "src/drivers/pc80/i8259.c"
#include "cbmem.h"
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
-void disable_cache_as_ram(void);
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c
index 202442c..a5d041f 100644
--- a/src/mainboard/amd/parmer/romstage.c
+++ b/src/mainboard/amd/parmer/romstage.c
@@ -28,6 +28,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
@@ -37,8 +38,6 @@
#include "src/drivers/pc80/i8259.c"
#include "cbmem.h"
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
-void disable_cache_as_ram(void);
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c
index 58829b4..dca0376 100644
--- a/src/mainboard/amd/persimmon/romstage.c
+++ b/src/mainboard/amd/persimmon/romstage.c
@@ -28,6 +28,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "superio/fintek/f81865f/f81865f_early_serial.c"
@@ -41,8 +42,6 @@
#include "cpu/amd/mtrr.h"
#include "cpu/amd/agesa/s3_resume.h"
-void disable_cache_as_ram(void); /* cache_as_ram.inc */
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
#define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1)
diff --git a/src/mainboard/amd/south_station/romstage.c b/src/mainboard/amd/south_station/romstage.c
index af12026..54fe083 100644
--- a/src/mainboard/amd/south_station/romstage.c
+++ b/src/mainboard/amd/south_station/romstage.c
@@ -29,6 +29,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "superio/fintek/f81865f/f81865f_early_serial.c"
diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c
index 6bf8ac6..9c3cf5b 100644
--- a/src/mainboard/amd/thatcher/romstage.c
+++ b/src/mainboard/amd/thatcher/romstage.c
@@ -28,6 +28,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
@@ -40,8 +41,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, LPC47N217_SP1)
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
-void disable_cache_as_ram(void);
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c
index a2da0f0..bc33207 100644
--- a/src/mainboard/amd/torpedo/romstage.c
+++ b/src/mainboard/amd/torpedo/romstage.c
@@ -27,6 +27,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "superio/smsc/kbc1100/kbc1100_early_init.c"
@@ -38,7 +39,6 @@
#include <arch/cpu.h>
#include "platform_cfg.h"
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
diff --git a/src/mainboard/amd/union_station/romstage.c b/src/mainboard/amd/union_station/romstage.c
index e4cd21b..e2e885c 100644
--- a/src/mainboard/amd/union_station/romstage.c
+++ b/src/mainboard/amd/union_station/romstage.c
@@ -29,6 +29,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c
index b76e6a8..62ec5e1 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/romstage.c
@@ -28,6 +28,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "superio/winbond/w83627hf/early_serial.c"
@@ -37,7 +38,6 @@
#include <sb_cimx.h>
#include "SBPLATFORM.h"
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
#define SERIAL_DEV PNP_DEV(CONFIG_SIO_PORT, W83627HF_SP1)
diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c
index 9b069b7..59d95f9 100644
--- a/src/mainboard/asrock/imb-a180/romstage.c
+++ b/src/mainboard/asrock/imb-a180/romstage.c
@@ -28,6 +28,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
@@ -40,8 +41,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627UHG_SP1)
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
-void disable_cache_as_ram(void);
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index 031bb50..5b2088e 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -29,6 +29,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
@@ -40,8 +41,6 @@
#include "src/drivers/pc80/i8259.c"
#include "cbmem.h"
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
-void disable_cache_as_ram(void);
#define MMIO_NON_POSTED_START 0xfed00000
#define MMIO_NON_POSTED_END 0xfedfffff
diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c
index cc2fc4b..b96f8ae 100644
--- a/src/mainboard/digitallogic/msm800sev/romstage.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -8,6 +8,7 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
+#include <cpu/amd/car.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -75,6 +76,5 @@ void main(unsigned long bist)
/* we are finding the return does not work on this board. Explicitly call the label that is
* after the call to us. This is gross, but sometimes at this level it is the only way out
*/
- void done_cache_as_ram_main(void);
done_cache_as_ram_main();
}
diff --git a/src/mainboard/gizmosphere/gizmo/romstage.c b/src/mainboard/gizmosphere/gizmo/romstage.c
index 05699cc..4e9977d 100755
--- a/src/mainboard/gizmosphere/gizmo/romstage.c
+++ b/src/mainboard/gizmosphere/gizmo/romstage.c
@@ -29,6 +29,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "drivers/pc80/i8254.c"
@@ -44,8 +45,6 @@
#define MSR_MTRR_VARIABLE_MASK6 0x020D
#define MSR_PSTATE_CONTROL 0xC0010062
-void disable_cache_as_ram(void); /* cache_as_ram.inc */
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
diff --git a/src/mainboard/lippert/frontrunner-af/romstage.c b/src/mainboard/lippert/frontrunner-af/romstage.c
index 093a047..b311a19 100644
--- a/src/mainboard/lippert/frontrunner-af/romstage.c
+++ b/src/mainboard/lippert/frontrunner-af/romstage.c
@@ -28,6 +28,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "superio/smsc/smscsuperio/early_serial.c"
@@ -41,8 +42,6 @@
#include "cpu/amd/mtrr.h"
#include "cpu/amd/agesa/s3_resume.h"
-void disable_cache_as_ram(void); /* cache_as_ram.inc */
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
diff --git a/src/mainboard/lippert/toucan-af/romstage.c b/src/mainboard/lippert/toucan-af/romstage.c
index 88b8100..43cf36f 100644
--- a/src/mainboard/lippert/toucan-af/romstage.c
+++ b/src/mainboard/lippert/toucan-af/romstage.c
@@ -28,6 +28,7 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "superio/winbond/w83627dhg/w83627dhg.h"
@@ -41,8 +42,6 @@
#include "cpu/amd/mtrr.h"
#include "cpu/amd/agesa/s3_resume.h"
-void disable_cache_as_ram(void); /* cache_as_ram.inc */
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
#define SERIAL_DEV PNP_DEV(0x4e, W83627DHG_SP1)
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index c3f964d..1c4ae09 100644
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -29,6 +29,7 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
+#include <cpu/amd/car.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include "northbridge/amd/lx/raminit.h"
@@ -162,6 +163,5 @@ void main(unsigned long bist)
* call the label that is after the call to us. This is gross, but
* sometimes at this level it is the only way out.
*/
- void done_cache_as_ram_main(void);
done_cache_as_ram_main();
}
diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c
index 6946900..18453ac 100644
--- a/src/mainboard/pcengines/alix2d/romstage.c
+++ b/src/mainboard/pcengines/alix2d/romstage.c
@@ -29,6 +29,7 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
+#include <cpu/amd/car.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include "northbridge/amd/lx/raminit.h"
@@ -186,6 +187,5 @@ void main(unsigned long bist)
* call the label that is after the call to us. This is gross, but
* sometimes at this level it is the only way out.
*/
- void done_cache_as_ram_main(void);
done_cache_as_ram_main();
}
diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c
index e9f359a..5c0dec5 100644
--- a/src/mainboard/supermicro/h8qgi/romstage.c
+++ b/src/mainboard/supermicro/h8qgi/romstage.c
@@ -26,6 +26,7 @@
#include <arch/stages.h>
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "northbridge/amd/agesa/family10/reset_test.h"
#include <nb_cimx.h>
@@ -33,7 +34,6 @@
#include "superio/nuvoton/wpcm450/wpcm450.h"
#include "superio/winbond/w83627dhg/w83627dhg.h"
-extern void disable_cache_as_ram(void); /* cache_as_ram.inc */
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c
index 61640c9..fce673f 100644
--- a/src/mainboard/supermicro/h8scm/romstage.c
+++ b/src/mainboard/supermicro/h8scm/romstage.c
@@ -26,6 +26,7 @@
#include <arch/stages.h>
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "northbridge/amd/agesa/family10/reset_test.h"
#include <nb_cimx.h>
@@ -35,7 +36,6 @@
#include "superio/nuvoton/wpcm450/wpcm450.h"
#include "superio/winbond/w83627dhg/w83627dhg.h"
-extern void disable_cache_as_ram(void); /* cache_as_ram.inc */
#define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1)
#define DUMMY_DEV PNP_DEV(0x2e, 0)
diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c
index f0b21e2..2415573 100644
--- a/src/mainboard/tyan/s8226/romstage.c
+++ b/src/mainboard/tyan/s8226/romstage.c
@@ -26,6 +26,7 @@
#include <arch/stages.h>
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "northbridge/amd/agesa/family10/reset_test.h"
#include <nb_cimx.h>
@@ -35,7 +36,6 @@
#include "src/drivers/pc80/i8254.c"
#include "src/drivers/pc80/i8259.c"
-extern void disable_cache_as_ram(void); /* cache_as_ram.inc */
#define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1)
#define DUMMY_DEV PNP_DEV(0x2e, 0)
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