[coreboot-gerrit] Patch set updated for coreboot: 14cdec5 lib/cbfs_core.c: Supply size of file as well in cbfs_get_file_content

Vladimir Serbinenko (phcoder@gmail.com) gerrit at coreboot.org
Sun Jan 12 13:54:47 CET 2014


Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4659

-gerrit

commit 14cdec5490597e0933bf67cbd4c63d203989206d
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sun Jan 12 13:45:52 2014 +0100

    lib/cbfs_core.c: Supply size of file as well in cbfs_get_file_content
    
    Change-Id: I5b93e5321e470f19ad22ca2cfdb1ebf3b340b252
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/device/oprom/realmode/x86.c                         | 3 ++-
 src/device/oprom/yabel/vbe.c                            | 3 ++-
 src/drivers/pc80/mc146818rtc.c                          | 4 ++--
 src/include/cbfs_core.h                                 | 2 +-
 src/lib/cbfs.c                                          | 8 ++++----
 src/lib/cbfs_core.c                                     | 9 ++++++++-
 src/lib/coreboot_table.c                                | 2 +-
 src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c | 2 +-
 src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c | 2 +-
 src/northbridge/intel/fsp_sandybridge/mrccache.c        | 6 +++---
 src/northbridge/intel/haswell/raminit.c                 | 2 +-
 src/northbridge/intel/sandybridge/mrccache.c            | 9 ++++-----
 src/northbridge/intel/sandybridge/raminit.c             | 2 +-
 src/vendorcode/google/chromeos/vboot_loader.c           | 2 +-
 14 files changed, 32 insertions(+), 24 deletions(-)

diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c
index 4385c03..e57f1c0 100644
--- a/src/device/oprom/realmode/x86.c
+++ b/src/device/oprom/realmode/x86.c
@@ -273,7 +273,8 @@ void vbe_set_graphics(void)
 	decdata = malloc(sizeof(*decdata));
 	unsigned char *jpeg = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
 						    "bootsplash.jpg",
-						    CBFS_TYPE_BOOTSPLASH);
+						    CBFS_TYPE_BOOTSPLASH,
+						    NULL);
 	if (!jpeg) {
 		printk(BIOS_DEBUG, "VBE: No bootsplash found.\n");
 		return;
diff --git a/src/device/oprom/yabel/vbe.c b/src/device/oprom/yabel/vbe.c
index 8658b77..333bdb4 100644
--- a/src/device/oprom/yabel/vbe.c
+++ b/src/device/oprom/yabel/vbe.c
@@ -727,7 +727,8 @@ void vbe_set_graphics(void)
 
 	unsigned char *jpeg = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
 						    "bootsplash.jpg",
-						    CBFS_TYPE_BOOTSPLASH);
+						    CBFS_TYPE_BOOTSPLASH,
+						    NULL);
 	if (!jpeg) {
 		DEBUG_PRINTF_VBE("Could not find bootsplash.jpg\n");
 		return;
diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c
index bd94bd2..51cd6c3 100644
--- a/src/drivers/pc80/mc146818rtc.c
+++ b/src/drivers/pc80/mc146818rtc.c
@@ -193,7 +193,7 @@ enum cb_err get_option(void *dest, const char *name)
 
 	/* find the requested entry record */
 	ct = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "cmos_layout.bin",
-				   CBFS_COMPONENT_CMOS_LAYOUT);
+				   CBFS_COMPONENT_CMOS_LAYOUT, NULL);
 	if (!ct) {
 		printk(BIOS_ERR, "RTC: cmos_layout.bin could not be found. "
 						"Options are disabled\n");
@@ -272,7 +272,7 @@ enum cb_err set_option(const char *name, void *value)
 
 	/* find the requested entry record */
 	ct = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "cmos_layout.bin",
-				   CBFS_COMPONENT_CMOS_LAYOUT);
+				   CBFS_COMPONENT_CMOS_LAYOUT, NULL);
 	if (!ct) {
 		printk(BIOS_ERR, "cmos_layout.bin could not be found. Options are disabled\n");
 		return CB_CMOS_LAYOUT_NOT_FOUND;
diff --git a/src/include/cbfs_core.h b/src/include/cbfs_core.h
index 04b5dd7..a1d8127 100644
--- a/src/include/cbfs_core.h
+++ b/src/include/cbfs_core.h
@@ -222,7 +222,7 @@ struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name);
 
 /* returns pointer to file content inside CBFS after if type is correct */
 void *cbfs_get_file_content(struct cbfs_media *media, const char *name,
-			    int type);
+			    int type, size_t *sz);
 
 /* returns decompressed size on success, 0 on failure */
 int cbfs_decompress(int algo, void *src, void *dst, int len);
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index 1f44695..e38f856 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -96,7 +96,7 @@ void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor,
 	tohex16(device, name+8);
 
 	orom = (struct cbfs_optionrom *)
-		cbfs_get_file_content(media, name, CBFS_TYPE_OPTIONROM);
+	  cbfs_get_file_content(media, name, CBFS_TYPE_OPTIONROM, NULL);
 
 	if (orom == NULL)
 		return NULL;
@@ -187,7 +187,7 @@ static void *load_stage_from_cbfs(struct cbfs_media *media, const char *name,
 	const struct cbmem_entry *ramstage_entry;
 
 	stage = (struct cbfs_stage *)
-		cbfs_get_file_content(media, name, CBFS_TYPE_STAGE);
+	  cbfs_get_file_content(media, name, CBFS_TYPE_STAGE, NULL);
 
 	if (stage == NULL)
 		return (void *) -1;
@@ -257,7 +257,7 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name)
 void * cbfs_load_stage(struct cbfs_media *media, const char *name)
 {
 	struct cbfs_stage *stage = (struct cbfs_stage *)
-		cbfs_get_file_content(media, name, CBFS_TYPE_STAGE);
+		cbfs_get_file_content(media, name, CBFS_TYPE_STAGE, NULL);
 	/* this is a mess. There is no ntohll. */
 	/* for now, assume compatible byte order until we solve this. */
 	uint32_t entry;
@@ -302,7 +302,7 @@ void *cbfs_load_payload(struct cbfs_media *media, const char *name)
 		return payload;
 
 	payload = (struct cbfs_payload *)cbfs_get_file_content(
-			media, name, CBFS_TYPE_PAYLOAD);
+		media, name, CBFS_TYPE_PAYLOAD, NULL);
 	return payload;
 }
 #endif
diff --git a/src/lib/cbfs_core.c b/src/lib/cbfs_core.c
index 612fef2..839b994 100644
--- a/src/lib/cbfs_core.c
+++ b/src/lib/cbfs_core.c
@@ -173,10 +173,14 @@ struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name)
 	return NULL;
 }
 
-void *cbfs_get_file_content(struct cbfs_media *media, const char *name, int type)
+void *cbfs_get_file_content(struct cbfs_media *media, const char *name,
+			    int type, size_t *sz)
 {
 	struct cbfs_file *file = cbfs_get_file(media, name);
 
+	if (sz)
+		*sz = 0;
+
 	if (file == NULL) {
 		ERROR("Could not find file '%s'.\n", name);
 		return NULL;
@@ -188,6 +192,9 @@ void *cbfs_get_file_content(struct cbfs_media *media, const char *name, int type
 		return NULL;
 	}
 
+	if (sz)
+		*sz = ntohl(file->len);
+
 	return (void *)CBFS_SUBHEADER(file);
 }
 
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 772729a..f433e86 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -505,7 +505,7 @@ unsigned long write_coreboot_table(
 	{
 		struct cmos_option_table *option_table = cbfs_get_file_content(
 				CBFS_DEFAULT_MEDIA, "cmos_layout.bin",
-				CBFS_COMPONENT_CMOS_LAYOUT);
+				CBFS_COMPONENT_CMOS_LAYOUT, NULL);
 		if (option_table) {
 			struct lb_record *rec_dest = lb_new_record(head);
 			/* Copy the option config table, it's already a lb_record... */
diff --git a/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c b/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
index 38bf975..cf84b39 100644
--- a/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
+++ b/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
@@ -428,7 +428,7 @@ AGESA_STATUS fam15tn_HookGfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *Con
 	GFX_VBIOS_IMAGE_INFO  *pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt;
 	pVbiosImageInfo->ImagePtr = cbfs_get_file_content(
 			CBFS_DEFAULT_MEDIA, "pci"CONFIG_VGA_BIOS_ID".rom",
-			CBFS_TYPE_OPTIONROM);
+			CBFS_TYPE_OPTIONROM, NULL);
 	/* printk(BIOS_DEBUG, "IMGptr=%x\n", pVbiosImageInfo->ImagePtr); */
 	return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS;
 }
diff --git a/src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c b/src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c
index eed8d40..b290931 100644
--- a/src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c
+++ b/src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c
@@ -401,7 +401,7 @@ AGESA_STATUS fam16kb_HookGfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *Con
 	GFX_VBIOS_IMAGE_INFO  *pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt;
 	pVbiosImageInfo->ImagePtr = cbfs_get_file_content(
 			CBFS_DEFAULT_MEDIA, "pci"CONFIG_VGA_BIOS_ID".rom",
-			CBFS_TYPE_OPTIONROM);
+			CBFS_TYPE_OPTIONROM, NULL);
 	/* printk(BIOS_DEBUG, "IMGptr=%x\n", pVbiosImageInfo->ImagePtr); */
 	return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS;
 }
diff --git a/src/northbridge/intel/fsp_sandybridge/mrccache.c b/src/northbridge/intel/fsp_sandybridge/mrccache.c
index a793880..b8893ae 100644
--- a/src/northbridge/intel/fsp_sandybridge/mrccache.c
+++ b/src/northbridge/intel/fsp_sandybridge/mrccache.c
@@ -58,10 +58,10 @@ static int is_mrc_cache(struct mrc_data_container *mrc_cache)
 
 static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
 {
-	u32 region_size;
-	region_size = CONFIG_MRC_CACHE_SIZE;
+	size_t region_size;
 	*mrc_region_ptr = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
-			"mrc.cache", 0xac);
+						"mrc.cache", 0xac,
+						&region_size);
 
 	return region_size;
 }
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index e916c5e..5944eeb 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -170,7 +170,7 @@ void sdram_initialize(struct pei_data *pei_data)
 
 	/* Locate and call UEFI System Agent binary. */
 	entry = (unsigned long)cbfs_get_file_content(
-			CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab);
+		CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab, NULL);
 	if (entry) {
 		int rv;
 		asm volatile (
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index b8120a8..5d7c49b 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -66,16 +66,15 @@ static int is_mrc_cache(struct mrc_data_container *mrc_cache)
  */
 static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
 {
-	u32 region_size;
 #if CONFIG_CHROMEOS
-	region_size =  find_fmap_entry("RW_MRC_CACHE", (void **)mrc_region_ptr);
+	return find_fmap_entry("RW_MRC_CACHE", (void **)mrc_region_ptr);
 #else
-	region_size = CONFIG_MRC_CACHE_SIZE;
+	size_t region_size;
 	*mrc_region_ptr = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
-			"mrc.cache", 0xac);
+						"mrc.cache", 0xac, &region_size);
+	return region_size;
 #endif
 
-	return region_size;
 }
 
 /*
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 333a6b5..6e52965 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -253,7 +253,7 @@ void sdram_initialize(struct pei_data *pei_data)
 	/* Locate and call UEFI System Agent binary. */
 	/* TODO make MRC blob (0xab?) defined in cbfs_core.h. */
 	entry = (unsigned long)cbfs_get_file_content(
-			CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab);
+		CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab, NULL);
 	if (entry) {
 		int rv;
 		asm volatile (
diff --git a/src/vendorcode/google/chromeos/vboot_loader.c b/src/vendorcode/google/chromeos/vboot_loader.c
index 4a0c36c..91f6237 100644
--- a/src/vendorcode/google/chromeos/vboot_loader.c
+++ b/src/vendorcode/google/chromeos/vboot_loader.c
@@ -48,7 +48,7 @@ static void vboot_run_stub(struct vboot_context *context)
 
 	stage = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
 	                              CONFIG_CBFS_PREFIX "/vboot",
-	                              CBFS_TYPE_STAGE);
+	                              CBFS_TYPE_STAGE, NULL);
 
 	if (stage == NULL)
 		return;



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