[coreboot-gerrit] New patch to review for coreboot: 28adef6 cubieboard: Configure system voltages from devicetree
Alexandru Gagniuc (mr.nuke.me@gmail.com)
gerrit at coreboot.org
Fri Jan 10 05:08:29 CET 2014
Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4640
-gerrit
commit 28adef663422b8218e3267113eb59fce9ded5866
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date: Thu Jan 9 20:45:21 2014 -0600
cubieboard: Configure system voltages from devicetree
Change-Id: I93bac9bf94f5bafcd3ff0c3d5763b31d3ee9959b
Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
src/mainboard/cubietech/cubieboard/Kconfig | 1 +
src/mainboard/cubietech/cubieboard/devicetree.cb | 9 ++++
src/mainboard/cubietech/cubieboard/romstage.c | 66 ++++++++++++++++++++++++
3 files changed, 76 insertions(+)
diff --git a/src/mainboard/cubietech/cubieboard/Kconfig b/src/mainboard/cubietech/cubieboard/Kconfig
index 72b797e..6cb84cf 100644
--- a/src/mainboard/cubietech/cubieboard/Kconfig
+++ b/src/mainboard/cubietech/cubieboard/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select ARCH_ARMV7
select CPU_ALLWINNER_A10
select BOARD_ROMSIZE_KB_4096
+ select DRIVER_XPOWERS_AXP209
config MAINBOARD_DIR
string
diff --git a/src/mainboard/cubietech/cubieboard/devicetree.cb b/src/mainboard/cubietech/cubieboard/devicetree.cb
index 1358777..65ea5ff 100644
--- a/src/mainboard/cubietech/cubieboard/devicetree.cb
+++ b/src/mainboard/cubietech/cubieboard/devicetree.cb
@@ -1,3 +1,12 @@
chip cpu/allwinner/a10
device cpu_cluster 0 on end
+
+ chip drivers/xpowers/axp209 # AXP209 is on I²C 0
+ device i2c 0x34 on end
+ register "dcdc2_voltage_mv" = "1400" # Vcore
+ register "dcdc3_voltage_mv" = "1250" # DLL Vdd
+ register "ldo2_voltage_mv" = "3000" # AVCC
+ register "ldo3_voltage_mv" = "2800" # NC?
+ register "ldo4_voltage_mv" = "2800" # CSI1-IO-2V8
+ end
end
diff --git a/src/mainboard/cubietech/cubieboard/romstage.c b/src/mainboard/cubietech/cubieboard/romstage.c
index 19192cd..744752b 100644
--- a/src/mainboard/cubietech/cubieboard/romstage.c
+++ b/src/mainboard/cubietech/cubieboard/romstage.c
@@ -6,9 +6,75 @@
*/
#include <console/console.h>
+#include <types.h>
+#define __SIMPLE_DEVICE__
+#include <device/device.h>
+#include <cbfs.h>
+#include <cpu/allwinner/a10/clock.h>
+#include <cpu/allwinner/a10/gpio.h>
+#include <cpu/allwinner/a10/twi.h>
+#include <arch/stages.h>
+#include <drivers/xpowers/axp209/axp209.h>
+#include <drivers/xpowers/axp209/chip.h>
+
+
+#define GPB_TWI0_FUNC 2
+#define GPB_TWI0_PINS ((1 << 0) | (1 << 1))
+
+#define AXP209_BUS 0
+
+static enum cb_err cubieboard_setup_power(void)
+{
+ enum cb_err err;
+ const struct device * pmu;
+ const struct drivers_xpowers_axp209_config *cfg;
+
+ /* Find the AXP209 in devicetree */
+ pmu = dev_find_slot_on_smbus(AXP209_BUS, AXP209_I2C_ADDR);
+ if (!pmu) {
+ printk(BIOS_ERR, "AXP209 not found in devicetree.cb\n");
+ return CB_ERR;
+ }
+
+ cfg = pmu->chip_info;
+
+ /* Mux TWI0 pins */
+ gpio_set_multipin_func(GPB, GPB_TWI0_PINS, GPB_TWI0_FUNC);
+ /* Enable TWI0 */
+ a1x_periph_clock_enable(A1X_CLKEN_TWI0);
+ a1x_twi_init(AXP209_BUS, 400000);
+
+ if ((err = axp209_init(AXP209_BUS)) != CB_SUCCESS) {
+ printk(BIOS_ERR, "PMU initialization failed\n");
+ return err;
+ }
+
+ if ((err = axp209_set_voltages(AXP209_BUS, cfg)) != CB_SUCCESS) {
+ printk(BIOS_WARNING, "Power setup incomplete: "
+ "CPU may hang when increasing clock\n");
+ return err;
+ }
+
+ printk(BIOS_SPEW, "DCDC2 %i\n", cfg->dcdc2_voltage_mv);
+ printk(BIOS_SPEW, "DCDC3 %i\n", cfg->dcdc3_voltage_mv);
+ printk(BIOS_SPEW, "LDO2 %i\n", cfg->ldo2_voltage_mv);
+ printk(BIOS_SPEW, "LDO3 %i\n", cfg->ldo3_voltage_mv);
+ printk(BIOS_SPEW, "LDO4 %i\n", cfg->ldo4_voltage_mv);
+
+ return CB_SUCCESS;
+}
void main(void)
{
+ void *entry;
console_init();
printk(BIOS_INFO, "You have managed to succesfully load romstage.\n");
+
+ /* Configure power rails */
+ cubieboard_setup_power();
+
+ entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram");
+ printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry);
+
+ stage_exit(entry);
}
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