[coreboot-gerrit] Patch set updated for coreboot: 32cb934 intel/*/acpi: Increase range length of MCHBAR buffer to 32 kB

Paul Menzel (paulepanter@users.sourceforge.net) gerrit at coreboot.org
Sat Feb 22 18:46:30 CET 2014


Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5192

-gerrit

commit 32cb934fba946ce23416d7e78e59e87541be51c3
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Tue Feb 11 10:38:27 2014 +0100

    intel/*/acpi: Increase range length of MCHBAR buffer to 32 kB
    
    Linux kernel 2.6.31 reports the warning below on Intel Ivy Bridge (with
    FSP).
    
    	resource map sanity check conflict: 0xfed10000 0xfed17fff 0xfed10000 0xfed13fff pnp 00:01
    
    Since Sandy Bridge the length of the MCHBAR is 32 kB and it is already
    used that way in other places.
    
    	$ more src/northbridge/intel/fsp_sandybridge/acpi/hostbridge.asl
    	[…]
    	OperationRegion (MCHB, SystemMemory, DEFAULT_MCHBAR, 0x8000)
    	[…]
    
    So instead of 16 kB specify that 32 kB are decoded in that memory
    range for Intel Sandy Bridge, Ivy Bridge and Haswell.
    
    (Linux kernel 3.10 does not warn about that.)
    
    Change-Id: Ie7a9356d9051c807833df85e4a806e5a9498473f
    Reported-by: Norwich in #coreboot on <irc.freenode.org>
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/northbridge/intel/fsp_sandybridge/acpi/sandybridge.asl | 2 +-
 src/northbridge/intel/haswell/acpi/haswell.asl             | 2 +-
 src/northbridge/intel/nehalem/acpi/nehalem.asl             | 2 +-
 src/northbridge/intel/sandybridge/acpi/sandybridge.asl     | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/northbridge/intel/fsp_sandybridge/acpi/sandybridge.asl b/src/northbridge/intel/fsp_sandybridge/acpi/sandybridge.asl
index 7d51135..e6012ff 100644
--- a/src/northbridge/intel/fsp_sandybridge/acpi/sandybridge.asl
+++ b/src/northbridge/intel/fsp_sandybridge/acpi/sandybridge.asl
@@ -30,7 +30,7 @@ Device (PDRC)
 
 	Name (PDRS, ResourceTemplate() {
 		Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
-		Memory32Fixed(ReadWrite, DEFAULT_MCHBAR,   0x00004000)
+		Memory32Fixed(ReadWrite, DEFAULT_MCHBAR,   0x00008000)
 		Memory32Fixed(ReadWrite, DEFAULT_DMIBAR,   0x00001000)
 		Memory32Fixed(ReadWrite, DEFAULT_EPBAR,    0x00001000)
 		Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)
diff --git a/src/northbridge/intel/haswell/acpi/haswell.asl b/src/northbridge/intel/haswell/acpi/haswell.asl
index 1634fe3..4db7295 100644
--- a/src/northbridge/intel/haswell/acpi/haswell.asl
+++ b/src/northbridge/intel/haswell/acpi/haswell.asl
@@ -30,7 +30,7 @@ Device (PDRC)
 
 	Name (PDRS, ResourceTemplate() {
 		Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
-		Memory32Fixed(ReadWrite, DEFAULT_MCHBAR,   0x00004000)
+		Memory32Fixed(ReadWrite, DEFAULT_MCHBAR,   0x00008000)
 		Memory32Fixed(ReadWrite, DEFAULT_DMIBAR,   0x00001000)
 		Memory32Fixed(ReadWrite, DEFAULT_EPBAR,    0x00001000)
 		Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)
diff --git a/src/northbridge/intel/nehalem/acpi/nehalem.asl b/src/northbridge/intel/nehalem/acpi/nehalem.asl
index aa74d0d..3c6c238 100644
--- a/src/northbridge/intel/nehalem/acpi/nehalem.asl
+++ b/src/northbridge/intel/nehalem/acpi/nehalem.asl
@@ -30,7 +30,7 @@ Device (PDRC)
 
 	Name (PDRS, ResourceTemplate() {
 		Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
-		Memory32Fixed(ReadWrite, DEFAULT_MCHBAR,   0x00004000)
+		Memory32Fixed(ReadWrite, DEFAULT_MCHBAR,   0x00008000)
 		Memory32Fixed(ReadWrite, DEFAULT_DMIBAR,   0x00001000)
 		Memory32Fixed(ReadWrite, DEFAULT_EPBAR,    0x00001000)
 		Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)
diff --git a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
index 6708e27..e32d5f1 100644
--- a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
+++ b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
@@ -30,7 +30,7 @@ Device (PDRC)
 
 	Name (PDRS, ResourceTemplate() {
 		Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
-		Memory32Fixed(ReadWrite, DEFAULT_MCHBAR,   0x00004000)
+		Memory32Fixed(ReadWrite, DEFAULT_MCHBAR,   0x00008000)
 		Memory32Fixed(ReadWrite, DEFAULT_DMIBAR,   0x00001000)
 		Memory32Fixed(ReadWrite, DEFAULT_EPBAR,    0x00001000)
 		Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)



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