[coreboot-gerrit] Patch set updated for coreboot: e52fe83 rambi: Enable SATA port
Aaron Durbin (adurbin@google.com)
gerrit at coreboot.org
Mon Feb 17 18:59:20 CET 2014
Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4914
-gerrit
commit e52fe8301d4f9f8ae97e9fd15d4ca50e1af58fa3
Author: Shawn Nematbakhsh <shawnn at chromium.org>
Date: Mon Oct 28 16:43:17 2013 -0700
rambi: Enable SATA port
Enable first SATA port in Rambi device tree.
BUG=chrome-os-partner:23643
TEST=TEST=Manual, in dev mode. Verify on rambi that SATA disk is
detected, and kernel is found + booted.
Change-Id: Ic0cb5f9ff17ca0f6cc7941f203b9338df200811d
Signed-off-by: Shawn Nematbakhsh <shawnn at chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174916
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/mainboard/google/rambi/devicetree.cb | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/mainboard/google/rambi/devicetree.cb b/src/mainboard/google/rambi/devicetree.cb
index 3086ebf..e7f86ce 100644
--- a/src/mainboard/google/rambi/devicetree.cb
+++ b/src/mainboard/google/rambi/devicetree.cb
@@ -1,4 +1,10 @@
chip soc/intel/baytrail
+
+ # SATA port enable mask (2 ports)
+ register "sata_port_map" = "0x1"
+ register "sata_ahci" = "0x1"
+ register "ide_legacy_combined" = "0x0"
+
device cpu_cluster 0 on
device lapic 0 on end
end
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