[coreboot-gerrit] Patch merged into coreboot/master: f9158a5 Jetway NF81-T56N-LF [2/2]: actually implement mainboard support.
gerrit at coreboot.org
gerrit at coreboot.org
Sun Feb 16 04:51:51 CET 2014
the following patch was just integrated into master:
commit f9158a5832e5d105003b7b6b1e829f0d74e68a7f
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Sat Jan 25 21:46:10 2014 +1100
Jetway NF81-T56N-LF [2/2]: actually implement mainboard support.
Step 2: change the Persimmon code to adapt it to the new board's hardware.
The NF81-T56N-LF is a IPC form factor embedded board:
- AMD Fusion G-T56N (1.65 GHz dual core) APU
- 2x SO-DIMM sockets for DDR3 800-1066 SDRAM (Fixed at 1.5V)
- VGA and LVDS (via Analogix ANX3110)
- AMD A55E (Hudson-E1) southbridge
- 6x USB 2.0/1.1 ports
- 5x SATA3 6Gb/s, 1x mSATA socket
- 6-Channel HD Audio (via VIA VT1705)
- PCI and ISA (via ITE IT8888)??
- NEC uPD78F0532 microcontroller on I2C ("SEMA")??
- 2x RJ45 GbE (via Realtek RTL8111E x2)
- Fintek F71869AD Super I/O
- PS/2 KB/MS port
- RS232 header (via Unisonic UTC 75232 RS232 driver/receiver)
- GPIO header
- CIR header
- 1x MXIC MX25L1606E (SO8, soldered) 16 Mbit SPI flash (BIOS)
Note: MX25L1606E is 16Mbit, 8bits in a byte, so 2MB. Jetway *lies*
claiming the SPI flash is 16MB. They also use red pen over the chip
so you wont see this deceit.
Change-Id: I03ccc58bc782e800aeef0d19679ce060277b0c04
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
See http://review.coreboot.org/4801 for details.
-gerrit
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