[coreboot-gerrit] Patch set updated for coreboot: a08ab5b sandy/ivy: Fix mrc.cache file in CBFS

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5211

-gerrit

commit a08ab5b59d9f5ec56bbe339e5f2e19a41363078a
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Thu Feb 13 00:33:40 2014 +0200

    sandy/ivy: Fix mrc.cache file in CBFS
    
    The file was not recreated when configuration changed. One would
    hit this bug when turning CHROMEOS on/off.
    
    Also do not create mrc.cache with CHROMEOS at all.
    
    Change-Id: I5b0ecde66589396b24967ce289bf65e20bb08825
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/northbridge/intel/sandybridge/Makefile.inc | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc
index cef52b2..a201745 100644
--- a/src/northbridge/intel/sandybridge/Makefile.inc
+++ b/src/northbridge/intel/sandybridge/Makefile.inc
@@ -40,7 +40,8 @@ mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
 mrc.bin-position := 0xfffa0000
 mrc.bin-type := 0xab
 
-$(obj)/mrc.cache:
+ifneq ($(CONFIG_CHROMEOS),y)
+$(obj)/mrc.cache: $(obj)/config.h
 	dd if=/dev/zero count=1 \
 	bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \
 	tr '\000' '\377' > $@
@@ -49,5 +50,6 @@ cbfs-files-$(CONFIG_HAVE_MRC_CACHE) += mrc.cache
 mrc.cache-file := $(obj)/mrc.cache
 mrc.cache-position := 0xfffd0000
 mrc.cache-type := 0xac
+endif
 
 $(obj)/northbridge/intel/sandybridge/acpi.ramstage.o : $(obj)/build.h