[coreboot-gerrit] New patch to review for coreboot: fdce34b NOTFORMERGE: lenovo/x201: Support digitizer on x201t variant

[Vladimir Serbinenko (phcoder@gmail.com)]

Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5096

-gerrit

commit fdce34b8883f2b8c6f5ee13f15bdf7cdc0f94016
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sat Feb 1 18:39:26 2014 +0100

    NOTFORMERGE: lenovo/x201: Support digitizer on x201t variant
    
    Thanks to Peter Stuge for his helpful insights
    Thanks to Carl-Daniel Hailfinger for info on PnP superio.
    Thanks to Jens Erat for letting me to experiment with his X201t.
    
    Change-Id: Idb504fabf1ac1a55d8ada8d2b2268038110e32e0
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/mainboard/lenovo/x201/Kconfig          |  1 +
 src/mainboard/lenovo/x201/acpi/superio.asl | 17 +++++++++++++++++
 src/mainboard/lenovo/x201/devicetree.cb    | 20 ++++++++++++++++++++
 src/mainboard/lenovo/x201/romstage.c       |  2 +-
 4 files changed, 39 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig
index 8e7ebae..7fd8543 100644
--- a/src/mainboard/lenovo/x201/Kconfig
+++ b/src/mainboard/lenovo/x201/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select ARCH_X86
 	select NORTHBRIDGE_INTEL_NEHALEM
 	select SOUTHBRIDGE_INTEL_IBEXPEAK
+	select SUPERIO_NSC_PC87382
 	select EC_LENOVO_PMH7
 	select EC_LENOVO_H8
 	select DRIVERS_ICS_954309
diff --git a/src/mainboard/lenovo/x201/acpi/superio.asl b/src/mainboard/lenovo/x201/acpi/superio.asl
index a2657f1..22b1afa 100644
--- a/src/mainboard/lenovo/x201/acpi/superio.asl
+++ b/src/mainboard/lenovo/x201/acpi/superio.asl
@@ -1 +1,18 @@
 #include "../../../../drivers/pc80/ps2_controller.asl"
+
+
+	Device (DTR)		// Digitizer
+	{
+		Name(_HID, EISAID("WACF004"))
+
+		Name(_CRS, ResourceTemplate()
+		{
+			IO (Decode16, 0x200, 0x200, 0x01, 0x08)
+                        IRQNoFlags () {5}
+		})
+
+		Method (_STA, 0)
+		{
+			Return (0xf)
+		}
+	}
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index 37a430c..e7c9c45 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -139,6 +139,26 @@ chip northbridge/intel/nehalem
 			end
 			device pci 1f.0 on # PCI-LPC bridge
 				subsystemid 0x17aa 0x2166
+				chip superio/nsc/pc87382
+					device pnp 164e.2 on # IR
+						io 0x60 = 0x2f8
+					end
+
+					device pnp 164e.3 on # Digitizer
+						io 0x60 = 0x200
+						irq 0x29 = 0xb0
+						irq 0x70 = 0x5
+						irq 0xf0 = 0x82
+					end
+
+					device pnp 164e.7 on # GPIO
+						io 0x60 = 0x1680
+					end
+
+					device pnp 164e.19 on # DLPC
+						io 0x60 = 0x164c
+					end
+				end
 			end
 			device pci 1f.2 on # IDE/SATA
 				subsystemid 0x17aa 0x2168
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index e3e0a62..5ed48a9 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -53,7 +53,7 @@ static void pch_enable_lpc(void)
 	/* Enable EC, PS/2 Keyboard/Mouse */
 	pci_write_config16(PCH_LPC_DEV, LPC_EN,
 			   CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN |
-			   COMA_LPC_EN);
+			   COMA_LPC_EN | GAMEL_LPC_EN);
 
 	pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x7c1601);
 	pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0xc15e1);