[coreboot-gerrit] Patch merged into coreboot/master: a859aa3 nyan*: Set GEN2 I2C pads to open-drain mode

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit a859aa3df5c56f7d0d2d0969c4de601b93e4c101
Author: Ken Chang <kenc at nvidia.com>
Date:   Thu May 22 10:54:16 2014 +0800

    nyan*: Set GEN2 I2C pads to open-drain mode
    
    The VDDIO to GEN2 I2C SCL/SDA pins is 1.8V and the external
    pull-up voltage is 3.3V (the external 3.3V > I/O 1.8V) thus
    the pinmux E_OD bit of these two pins needs to be set to
    ensure GEN2 I2C pads work fine on 3.3V.
    
    BRANCH=nyan
    BUG=none
    TEST=observed voltage drop from 3.3V to 2.36V on gen2 i2c
    on blaze w/o this change. the waveform looks good on both
    scl/sda pins w/ this change.
    
    Original-Change-Id: I1b97f0c9c7580d1e532c3bdf7ac8690241ee7ee3
    Original-Signed-off-by: Ken Chang <kenc at nvidia.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/200996
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
    (cherry picked from commit 2db39166ec525e56a19746f38a867305a2687365)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I0c84eade89311baf0a6f180cb5cc9e2145f6b7ea
    Reviewed-on: http://review.coreboot.org/7952
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Kyösti Mälkki <kyosti.malkki at gmail.com>


See http://review.coreboot.org/7952 for details.

-gerrit