[coreboot-gerrit] New patch to review for coreboot: 252ace1 soc/samsung/exynos: Layout common code framework

Edward O'Callaghan (eocallaghan@alterapraxis.com) gerrit at coreboot.org
Fri Dec 26 04:08:02 CET 2014


Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7929

-gerrit

commit 252ace1006c0e0700397cf49ab7538e9f0451fc7
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Fri Dec 26 13:58:56 2014 +1100

    soc/samsung/exynos: Layout common code framework
    
    Layout the framework to merge common components between Exynos
    families.
    
    Change-Id: Ic8896e791dac9757c2bd19f390d0a5821f96fc06
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/soc/samsung/exynos/Makefile.inc     | 15 +++++++++++++++
 src/soc/samsung/exynos/cbmem.c          | 27 +++++++++++++++++++++++++++
 src/soc/samsung/exynos5250/Makefile.inc |  6 ++++--
 src/soc/samsung/exynos5420/Makefile.inc |  6 ++++--
 4 files changed, 50 insertions(+), 4 deletions(-)

diff --git a/src/soc/samsung/exynos/Makefile.inc b/src/soc/samsung/exynos/Makefile.inc
new file mode 100644
index 0000000..74e1c7a
--- /dev/null
+++ b/src/soc/samsung/exynos/Makefile.inc
@@ -0,0 +1,15 @@
+#bootblock-y += mct.c power.c
+
+# Clock is required for UART
+#bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c
+
+#romstage-y += mct.c
+#romstage-y += monotonic_timer.c
+romstage-y += cbmem.c
+#romstage-y += power.c
+
+#ramstage-y += mct.c
+#ramstage-y += monotonic_timer.c
+ramstage-y += cbmem.c
+#ramstage-y += power.c
+#ramstage-y += usb.c
diff --git a/src/soc/samsung/exynos/cbmem.c b/src/soc/samsung/exynos/cbmem.c
new file mode 100644
index 0000000..4650320
--- /dev/null
+++ b/src/soc/samsung/exynos/cbmem.c
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stddef.h>
+#include <cbmem.h>
+#include "cpu.h"
+
+void *cbmem_top(void)
+{
+	return (void *)(get_fb_base_kb() * KiB);
+}
diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc
index 735ce2e..c56ee42 100644
--- a/src/soc/samsung/exynos5250/Makefile.inc
+++ b/src/soc/samsung/exynos5250/Makefile.inc
@@ -1,3 +1,5 @@
+subdirs-y += ../exynos
+
 bootblock-y += spi.c alternate_cbfs.c
 bootblock-y += bootblock.c
 bootblock-y += pinmux.c mct.c power.c
@@ -28,7 +30,6 @@ romstage-y += timer.c
 romstage-y += trustzone.c
 romstage-y += i2c.c
 #romstage-y += wdt.c
-romstage-y += cbmem.c
 
 ramstage-y += spi.c alternate_cbfs.c
 ramstage-y += clock.c
@@ -46,7 +47,8 @@ ramstage-y += i2c.c
 ramstage-y += dp-reg.c
 ramstage-y += fb.c
 ramstage-y += usb.c
-ramstage-y += cbmem.c
+
+CPPFLAGS_common += -Isrc/soc/samsung/exynos/
 
 $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
 	cp $< $@
diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc
index ac22620..450f408 100644
--- a/src/soc/samsung/exynos5420/Makefile.inc
+++ b/src/soc/samsung/exynos5420/Makefile.inc
@@ -1,3 +1,5 @@
+subdirs-y += ../exynos
+
 bootblock-y += spi.c alternate_cbfs.c
 bootblock-y += bootblock.c
 bootblock-y += pinmux.c mct.c power.c
@@ -28,7 +30,6 @@ romstage-y += gpio.c
 romstage-y += timer.c
 romstage-y += i2c.c
 #romstage-y += wdt.c
-romstage-y += cbmem.c
 romstage-y += trustzone.c
 
 ramstage-y += spi.c alternate_cbfs.c
@@ -46,7 +47,8 @@ ramstage-y += gpio.c
 ramstage-y += i2c.c
 ramstage-y += dp.c dp_lowlevel.c fimd.c
 ramstage-y += usb.c
-ramstage-y += cbmem.c
+
+CPPFLAGS_common += -Isrc/soc/samsung/exynos/
 
 $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
 	cp $< $@



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