[coreboot-gerrit] New patch to review for coreboot: 77a1f51 mainboard/lenovo/g505s/romstage.c: Trim off some includes

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7636

-gerrit

commit 77a1f51f1f6669fe2a40a8bf4fc04d337e80b5c6
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Wed Dec 3 22:20:40 2014 +1100

    mainboard/lenovo/g505s/romstage.c: Trim off some includes
    
    Change-Id: Id856f8cbec986806d3aeaeeafba30f1b31a90d8e
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/mainboard/lenovo/g505s/romstage.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/src/mainboard/lenovo/g505s/romstage.c b/src/mainboard/lenovo/g505s/romstage.c
index d142a9d..0d73a42 100644
--- a/src/mainboard/lenovo/g505s/romstage.c
+++ b/src/mainboard/lenovo/g505s/romstage.c
@@ -29,15 +29,11 @@
 #include <cpu/x86/bist.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/amd/car.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <stdint.h>
 #include <string.h>
 #include <southbridge/amd/agesa/hudson/hudson.h>
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-	u32 val;
 	agesawrapper_amdinitmmio();
 
 	hudson_lpc_port80();
@@ -54,8 +50,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	report_bist_failure(bist);
 
 	/* Load MPB */
-	val = cpuid_eax(1);
-	printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
+	printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", cpuid_eax(1));
 	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
 
 	post_code(0x37);