[coreboot-gerrit] New patch to review for coreboot: 4fe3615 mainboard/hp/pavilion_m6_1035dx: Remove HUDSON_LEGACY_FREE

Edward O'Callaghan (eocallaghan@alterapraxis.com) gerrit at coreboot.org
Tue Dec 2 11:07:38 CET 2014


Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7628

-gerrit

commit 4fe3615922147f973a4878c459a0fe619a5fc351
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Tue Dec 2 21:04:13 2014 +1100

    mainboard/hp/pavilion_m6_1035dx: Remove HUDSON_LEGACY_FREE
    
    The Embedded Controller sits behind the LPC bridge and so needs
    LPC decodes to be enabled.
    
    Remove the LPC decode enable out of agesawrapper.c. The enable
    is in fact done in: 'VOID FchInitResetLpcProgram(IN VOID *FchDataPtr)'
    which writes the magic '0xFF03FFD5' to register 0x44 of the PCI 14.3
    LPC Bridge to enable LPC decodes when HUDSON_LEGACY_FREE is not defined.
    
    Change-Id: Ia487d21faa0fceb2557dbce14ef8822116fada91
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/mainboard/hp/pavilion_m6_1035dx/Kconfig        | 4 ----
 src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c | 7 -------
 2 files changed, 11 deletions(-)

diff --git a/src/mainboard/hp/pavilion_m6_1035dx/Kconfig b/src/mainboard/hp/pavilion_m6_1035dx/Kconfig
index 12e0579..30e50c1 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/Kconfig
+++ b/src/mainboard/hp/pavilion_m6_1035dx/Kconfig
@@ -69,8 +69,4 @@ config VGA_BIOS_ID
 	string
 	default "1002,9900"
 
-config HUDSON_LEGACY_FREE
-	bool
-	default y
-
 endif # BOARD_HP_PAVILION_M6_1035DX
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c
index 4cbaeaa..4417681 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c
@@ -118,8 +118,6 @@ AGESA_STATUS agesawrapper_amdinitmmio(void)
 {
 	AGESA_STATUS                  Status;
 	UINT64                        MsrReg;
-	UINT32                        PciData;
-	PCI_ADDR                      PciAddress;
 	AMD_CONFIG_PARAMS             StdHeader;
 
 	/*
@@ -136,11 +134,6 @@ AGESA_STATUS agesawrapper_amdinitmmio(void)
 	MsrReg = MsrReg | 0x0000400000000000;
 	LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader);
 
-	/* For serial port */
-	PciData = 0xFF03FFD5;
-	PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x14, 0x3, 0x44);
-	LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
-
 	/* Set ROM cache onto WP to decrease post time */
 	MsrReg = (0x0100000000ull - CACHE_ROM_SIZE) | 5ull;
 	LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);



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