[coreboot-gerrit] Patch set updated for coreboot: 9c31d0b lenovo/t530: Use native LVDS gfx init

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6395

-gerrit

commit 9c31d0b6c86b3ebd88357a030125e75a4d750ea6
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Tue Jul 29 14:42:26 2014 +1000

    lenovo/t530: Use native LVDS gfx init
    
    As introduced in:
    1783a3c ivybridge: LVDS gfx init.
    
    Change-Id: I2e3b56a2a3d1ede08a704b839cc11fe6d685cf5b
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/mainboard/lenovo/t530/Kconfig       | 6 ++++++
 src/mainboard/lenovo/t530/devicetree.cb | 6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig
index efeca4b..76c36c1 100644
--- a/src/mainboard/lenovo/t530/Kconfig
+++ b/src/mainboard/lenovo/t530/Kconfig
@@ -13,6 +13,12 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_CMOS_DEFAULT
 	select HAVE_ACPI_RESUME
 	select HAVE_SMI_HANDLER
+	select EARLY_CBMEM_INIT
+	select VGA
+	select INTEL_EDID
+	select MAINBOARD_HAS_NATIVE_VGA_INIT
+	select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
+	select IVYBRIDGE_LVDS
 
 	# Workaround for EC/KBC IRQ1.
 	select SERIRQ_CONTINUOUS_MODE
diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index 6a09004..d9b751a 100644
--- a/src/mainboard/lenovo/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -10,6 +10,12 @@ chip northbridge/intel/sandybridge
 	register "gpu_panel_power_down_delay" = "100"		# T5+T6: 10ms
 	register "gpu_panel_power_backlight_on_delay" = "2100"	# T3: 210ms
 	register "gpu_panel_power_backlight_off_delay" = "2100"	# T4: 210ms
+	register "gpu_use_spread_spectrum_clock" = "1"
+	register "gpu_lvds_dual_channel" = "0"
+	register "gpu_link_frequency_270_mhz" = "1"
+	register "gpu_lvds_num_lanes" = "1"
+	register "gpu_cpu_backlight" = "0x1155"
+	register "gpu_pch_backlight" = "0x11551155"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_rPGA989