[coreboot-gerrit] New patch to review for coreboot: 6e7db22 gm45: Reserve RAM for ME if it's active.
Vladimir Serbinenko (phcoder@gmail.com)
gerrit at coreboot.org
Tue Aug 12 21:52:16 CEST 2014
Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6628
-gerrit
commit 6e7db2256163d95414f90e50c5a5bad2839b5465
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date: Tue Aug 12 21:51:28 2014 +0200
gm45: Reserve RAM for ME if it's active.
Change-Id: Icd2b075cec9461f9d6028a8c845f6900b6fe04c8
Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
src/northbridge/intel/gm45/raminit.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index 149127f..2d92651 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -1211,7 +1211,8 @@ static void program_memory_map(const dimminfo_t *const dimms, const channel_mode
/* Calculate memory mapping, all values in MB. */
const unsigned int MMIOstart = 0x0c00; /* 3GB, makes MTRR configuration small. */
- const unsigned int ME_SIZE = 0;
+ const int me_active = pci_read_config8(PCI_DEV(0, 3, 0), PCI_CLASS_REVISION) != 0xff;
+ const unsigned int ME_SIZE = prejedec || !me_active ? 0 : 32;
const unsigned int usedMEsize = (total_mb[0] != total_mb[1]) ? ME_SIZE : 2 * ME_SIZE;
const unsigned int claimCapable =
!(pci_read_config32(PCI_DEV(0, 0, 0), D0F0_CAPID0 + 4) & (1 << (47 - 32)));
@@ -1267,8 +1268,9 @@ static void program_memory_map(const dimminfo_t *const dimms, const channel_mode
"TOLUD = %5uMB\n"
"TOUUD = %5uMB\n"
"REMAP:\t base = %5uMB\n"
- "\t limit = %5uMB\n",
- TOM, TOLUD, TOUUD, REMAPbase, REMAPlimit);
+ "\t limit = %5uMB\n"
+ "usedMEsize: %dMB\n",
+ TOM, TOLUD, TOUUD, REMAPbase, REMAPlimit, usedMEsize);
}
static void prejedec_memory_map(const dimminfo_t *const dimms, channel_mode_t mode)
{
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