[coreboot-gerrit] Patch set updated for coreboot: aca0130 lenovo/x201: Enable pcie lanes in wwan slot.

Vladimir Serbinenko (phcoder@gmail.com) gerrit at coreboot.org
Mon Aug 4 21:26:56 CEST 2014


Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6482

-gerrit

commit aca01303ee1b4daf3cf82f18c84e01394e1eece9
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sun Aug 3 14:55:14 2014 +0200

    lenovo/x201: Enable pcie lanes in wwan slot.
    
    Change-Id: I7332eeed244877252074e661f1c256a69a9b428a
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/mainboard/lenovo/x201/devicetree.cb | 3 ++-
 src/mainboard/lenovo/x201/romstage.c    | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index 1db5bf0..21e328a 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -135,8 +135,9 @@ chip northbridge/intel/nehalem
 			end
 
 			device pci 1c.0 on end # PCIe Port #1
+			device pci 1c.1 on end # PCIe Port #2 (wwan)
 			device pci 1c.3 on end # PCIe Port #4 (Expresscard)
-			device pci 1c.4 on end # PCIe Port #4 (wlan)
+			device pci 1c.4 on end # PCIe Port #5 (wlan)
 
 			device pci 1d.0 on # USB2 EHCI
 				subsystemid 0x17aa 0x2163
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index f129794..aa2c367 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -126,7 +126,7 @@ static void rcba_config(void)
 		/* 33e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
 		/* 33f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
 		/* 3400 */ 0x0000001c, 0x00000080, 0x00000000, 0x00000000,
-		/* 3410 */ 0x00000c61, 0x00000000, 0x16e61fe1, 0xbf4f001f,
+		/* 3410 */ 0x00000c61, 0x00000000, 0x16e41fe1, 0xbf4f001f,
 		/* 3420 */ 0x00000000, 0x00060010, 0x0000001d, 0x00000000,
 		/* 3430 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
 		/* 3440 */ 0xdeaddeed, 0x00000000, 0x00000000, 0x00000000,



More information about the coreboot-gerrit mailing list