[coreboot-gerrit] New patch to review for coreboot: a0ab902 lenovo/t530: Comment gpio writeouts for later reference

Edward O'Callaghan (eocallaghan@alterapraxis.com) gerrit at coreboot.org
Fri Aug 1 12:37:46 CEST 2014


Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6435

-gerrit

commit a0ab9023da7af75560ca959a81d31ee153442c66
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Fri Aug 1 20:29:40 2014 +1000

    lenovo/t530: Comment gpio writeouts for later reference
    
    Change-Id: Id2471cd22aa402d74163473e48f86af9789cdaa7
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/mainboard/lenovo/t530/romstage.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c
index d65031a..36df52d 100644
--- a/src/mainboard/lenovo/t530/romstage.c
+++ b/src/mainboard/lenovo/t530/romstage.c
@@ -182,16 +182,16 @@ void main(unsigned long bist)
 	pci_write_config8(PCH_LPC_DEV, GPIO_CNTL, 0x10);
 
 //	setup_pch_gpios(&t530_gpio_map);
-	outl(0x3962a5ff, DEFAULT_GPIOBASE);
-	outl(0x8ebf6aff, DEFAULT_GPIOBASE + 4);
-	outl(0x66917ebb, DEFAULT_GPIOBASE + 0xc);
-	outl(0x00002002, DEFAULT_GPIOBASE + 0x2c);
-	outl(0x02ff08fe, DEFAULT_GPIOBASE + 0x30);
-	outl(0x1f47f7fd, DEFAULT_GPIOBASE + 0x34);
-	outl(0xffbeff43, DEFAULT_GPIOBASE + 0x38);
-	outl(0x000000ff, DEFAULT_GPIOBASE + 0x40);
-	outl(0x00000fff, DEFAULT_GPIOBASE + 0x44);
-	outl(0x00000f4f, DEFAULT_GPIOBASE + 0x48);
+	outl(0x3962a5ff, DEFAULT_GPIOBASE);        // GPIO_USE_SEL
+	outl(0x8ebf6aff, DEFAULT_GPIOBASE + 4);    // GP_IO_SEL
+	outl(0x66917ebb, DEFAULT_GPIOBASE + 0xc);  // GP_LVL
+	outl(0x00002002, DEFAULT_GPIOBASE + 0x2c); // GPI_INV
+	outl(0x02ff08fe, DEFAULT_GPIOBASE + 0x30); // GPIO_USE_SEL2
+	outl(0x1f47f7fd, DEFAULT_GPIOBASE + 0x34); // GP_IO_SEL2
+	outl(0xffbeff43, DEFAULT_GPIOBASE + 0x38); // GP_LVL2
+	outl(0x000000ff, DEFAULT_GPIOBASE + 0x40); // GPIO_USE_SEL3
+	outl(0x00000fff, DEFAULT_GPIOBASE + 0x44); // GPIO_SEL3
+	outl(0x00000f4f, DEFAULT_GPIOBASE + 0x48); // GPIO_LVL3
 
 	/* Initialize console device(s) */
 	console_init();



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