[coreboot-gerrit] Patch set updated for coreboot: 737cdb0 build rules: Identify build stage with simple variables
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Tue Apr 15 16:21:44 CEST 2014
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5410
-gerrit
commit 737cdb0c817edf6c3c42f11df33e443d372f4816
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Wed Feb 26 15:19:04 2014 +0200
build rules: Identify build stage with simple variables
Provide simple environment variables telling which stage of boot is
being built.
Change-Id: I8cbb5cf91f53e01c06e7d672b5be3f5c235f911d
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/arch/armv7/include/arch/rules.h | 23 +++++++++++++++++++++++
src/arch/x86/Makefile.inc | 4 ++--
src/arch/x86/include/arch/rules.h | 29 +++++++++++++++++++++++++++++
3 files changed, 54 insertions(+), 2 deletions(-)
diff --git a/src/arch/armv7/include/arch/rules.h b/src/arch/armv7/include/arch/rules.h
index a790365..de68f04 100644
--- a/src/arch/armv7/include/arch/rules.h
+++ b/src/arch/armv7/include/arch/rules.h
@@ -19,6 +19,29 @@
#ifndef _ARCH_RULES_H
#define _ARCH_RULES_H
+/* Useful helpers to tell whether the code is executing in bootblock,
+ * romstage, ramstage or SMM.
+ */
+
+#if defined(__BOOT_BLOCK__)
+#define ENV_BOOTBLOCK 1
+#define ENV_ROMSTAGE 0
+#define ENV_RAMSTAGE 0
+
+#elif defined(__PRE_RAM__)
+#define ENV_BOOTBLOCK 0
+#define ENV_ROMSTAGE 1
+#define ENV_RAMSTAGE 0
+
+#else
+#define ENV_BOOTBLOCK 0
+#define ENV_ROMSTAGE 0
+#define ENV_RAMSTAGE 1
+#endif
+
+/* SMM not implemented on ARM. */
+#define ENV_SMM 0
+
/* For romstage and ramstage always build with simple device model, ie.
* PCI, PNP and CPU functions operate without use of devicetree.
*
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 56f0c5c..f986c3b 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -368,9 +368,9 @@ endif
bootblock_inc += $(objgenerated)/bootblock.inc
bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
-bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
+bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__ -D__BOOT_BLOCK__
ifeq ($(CONFIG_SSE),y)
-bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__
+bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__ -D__BOOT_BLOCK__
endif
$(objgenerated)/bootblock.ld: $$(bootblock_lds) $(obj)/ldoptions
diff --git a/src/arch/x86/include/arch/rules.h b/src/arch/x86/include/arch/rules.h
index 4b84677..1ed1f1f 100644
--- a/src/arch/x86/include/arch/rules.h
+++ b/src/arch/x86/include/arch/rules.h
@@ -19,6 +19,35 @@
#ifndef _ARCH_RULES_H
#define _ARCH_RULES_H
+/* Useful helpers to tell whether the code is executing in bootblock,
+ * romstage, ramstage or SMM.
+ */
+
+#if defined(__BOOT_BLOCK__)
+#define ENV_BOOTBLOCK 1
+#define ENV_ROMSTAGE 0
+#define ENV_RAMSTAGE 0
+#define ENV_SMM 0
+
+#elif defined(__PRE_RAM__)
+#define ENV_BOOTBLOCK 0
+#define ENV_ROMSTAGE 1
+#define ENV_RAMSTAGE 0
+#define ENV_SMM 0
+
+#elif defined(__SMM__)
+#define ENV_BOOTBLOCK 0
+#define ENV_ROMSTAGE 0
+#define ENV_RAMSTAGE 0
+#define ENV_SMM 1
+#else
+
+#define ENV_BOOTBLOCK 0
+#define ENV_ROMSTAGE 0
+#define ENV_RAMSTAGE 1
+#define ENV_SMM 0
+#endif
+
/* For romstage and ramstage always build with simple device model, ie.
* PCI, PNP and CPU functions operate without use of devicetree.
*
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