[coreboot-gerrit] New patch to review for coreboot: 26befd6 qemu: q35: avoid address conflict
Gerd Hoffmann (kraxel@redhat.com)
gerrit at coreboot.org
Tue Sep 17 11:08:10 CEST 2013
Gerd Hoffmann (kraxel at redhat.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3926
-gerrit
commit 26befd67ccfb3094b04011c302c3b41c867136d0
Author: Gerd Hoffmann <kraxel at redhat.com>
Date: Tue Sep 17 09:49:02 2013 +0200
qemu: q35: avoid address conflict
Change-Id: Ife83f7ad4c1aab487ea3e3f14f51d91e02d23592
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
---
src/southbridge/intel/i82801ix/i82801ix.h | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h
index ca28107..a732b3a 100644
--- a/src/southbridge/intel/i82801ix/i82801ix.h
+++ b/src/southbridge/intel/i82801ix/i82801ix.h
@@ -29,7 +29,11 @@
#define DEFAULT_TBAR 0xfed1b000
#define DEFAULT_RCBA 0xfed1c000
-#define DEFAULT_PMBASE 0x00000500 /* Speedstep code has this hardcoded, too. */
+#ifdef CONFIG_BOARD_EMULATION_QEMU_X86_Q35
+# define DEFAULT_PMBASE 0x00000700
+#else
+# define DEFAULT_PMBASE 0x00000500 /* Speedstep code has this hardcoded, too. */
+#endif
#define DEFAULT_TCOBASE (DEFAULT_PMBASE + 0x60)
#define DEFAULT_GPIOBASE 0x00000580
@@ -120,7 +124,11 @@
#define D28Fx_SLCAP 0x54
-#define SMBUS_IO_BASE 0x0400
+#ifdef CONFIG_BOARD_EMULATION_QEMU_X86_Q35
+# define SMBUS_IO_BASE 0x0600
+#else
+# define SMBUS_IO_BASE 0x0400
+#endif
/* PCI Configuration Space (D31:F3): SMBus */
#define SMB_BASE 0x20
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