[coreboot-gerrit] New patch to review for coreboot: c668096 intel/i945 boards: Add EARLY_CBMEM_INIT
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Sun Oct 27 11:58:53 CET 2013
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3994
-gerrit
commit c668096b58dc50a51de63ddd810544af4f6b5cc7
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Sun Oct 13 20:41:57 2013 +0300
intel/i945 boards: Add EARLY_CBMEM_INIT
Inspired by commits ac6ea04b and 4560ca50 that enabled this feature
for lenovo/x60 and lenovo/t60 with i945 chipset.
Change-Id: Ia04f58b8c3769b5734708c6a338bb80c13c5aeba
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/mainboard/getac/p470/Kconfig | 1 +
src/mainboard/getac/p470/romstage.c | 8 +++++---
src/mainboard/ibase/mb899/Kconfig | 1 +
src/mainboard/ibase/mb899/romstage.c | 8 +++++---
src/mainboard/intel/d945gclf/Kconfig | 1 +
src/mainboard/intel/d945gclf/romstage.c | 8 +++++---
src/mainboard/kontron/986lcd-m/Kconfig | 1 +
src/mainboard/kontron/986lcd-m/romstage.c | 8 +++++---
src/mainboard/roda/rk886ex/Kconfig | 1 +
src/mainboard/roda/rk886ex/romstage.c | 8 +++++---
10 files changed, 30 insertions(+), 15 deletions(-)
diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig
index 3fdf6f7..db42233 100644
--- a/src/mainboard/getac/p470/Kconfig
+++ b/src/mainboard/getac/p470/Kconfig
@@ -30,6 +30,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SUPERIO_SMSC_FDC37N972
select SUPERIO_SMSC_SIO10N268
select EC_ACPI
+ select EARLY_CBMEM_INIT
select HAVE_ACPI_TABLES
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c
index f4e43e5..87af8ca 100644
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/romstage.c
@@ -26,6 +26,7 @@
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <lib.h>
+#include <cbmem.h>
#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include <cpu/x86/bist.h>
@@ -263,12 +264,11 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32;
}
-#include <cbmem.h>
-
void main(unsigned long bist)
{
u32 reg32;
int boot_mode = 0;
+ int cbmem_was_initted;
if (bist == 0)
enable_lapic();
@@ -357,11 +357,13 @@ void main(unsigned long bist)
#endif
MCHBAR16(SSKPD) = 0xCAFE;
+ cbmem_was_initted = !cbmem_initialize();
+
#if CONFIG_HAVE_ACPI_RESUME
/* If there is no high memory area, we didn't boot before, so
* this is not a resume. In that case we just create the cbmem toc.
*/
- if ((boot_mode == 2) && cbmem_reinit()) {
+ if ((boot_mode == 2) && cbmem_was_initted) {
void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
/* copy 1MB - 64K to high tables ram_base to prevent memory corruption
diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig
index 36353b3..72b916f 100644
--- a/src/mainboard/ibase/mb899/Kconfig
+++ b/src/mainboard/ibase/mb899/Kconfig
@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CHECK_SLFRCS_ON_RESUME
select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_WINBOND_W83627EHG
+ select EARLY_CBMEM_INIT
select HAVE_ACPI_TABLES
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c
index b059a57..222c376 100644
--- a/src/mainboard/ibase/mb899/romstage.c
+++ b/src/mainboard/ibase/mb899/romstage.c
@@ -26,6 +26,7 @@
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <lib.h>
+#include <cbmem.h>
#include "superio/winbond/w83627ehg/w83627ehg.h"
#include <pc80/mc146818rtc.h>
#include <console/console.h>
@@ -221,12 +222,11 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32;
}
-#include <cbmem.h>
-
void main(unsigned long bist)
{
u32 reg32;
int boot_mode = 0;
+ int cbmem_was_initted;
if (bist == 0)
enable_lapic();
@@ -311,11 +311,13 @@ void main(unsigned long bist)
MCHBAR16(SSKPD) = 0xCAFE;
+ cbmem_was_initted = !cbmem_initialize();
+
#if CONFIG_HAVE_ACPI_RESUME
/* If there is no high memory area, we didn't boot before, so
* this is not a resume. In that case we just create the cbmem toc.
*/
- if ((boot_mode == 2) && cbmem_reinit()) {
+ if ((boot_mode == 2) && cbmem_was_initted) {
void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
/* copy 1MB - 64K to high tables ram_base to prevent memory corruption
diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig
index 0a9de1a..b676eb6 100644
--- a/src/mainboard/intel/d945gclf/Kconfig
+++ b/src/mainboard/intel/d945gclf/Kconfig
@@ -30,6 +30,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
+ select EARLY_CBMEM_INIT
select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_512
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 248aa3b..166743f 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -26,6 +26,7 @@
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <lib.h>
+#include <cbmem.h>
#include "superio/smsc/lpc47m15x/lpc47m15x.h"
#include <pc80/mc146818rtc.h>
#include <console/console.h>
@@ -182,12 +183,11 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32;
}
-#include <cbmem.h>
-
void main(unsigned long bist)
{
u32 reg32;
int boot_mode = 0;
+ int cbmem_was_initted;
if (bist == 0)
enable_lapic();
@@ -269,11 +269,13 @@ void main(unsigned long bist)
MCHBAR16(SSKPD) = 0xCAFE;
+ cbmem_was_initted = !cbmem_initialize();
+
#if CONFIG_HAVE_ACPI_RESUME
/* If there is no high memory area, we didn't boot before, so
* this is not a resume. In that case we just create the cbmem toc.
*/
- if ((boot_mode == 2) && cbmem_reinit()) {
+ if ((boot_mode == 2) && cbmem_was_initted) {
void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
/* copy 1MB - 64K to high tables ram_base to prevent memory corruption
diff --git a/src/mainboard/kontron/986lcd-m/Kconfig b/src/mainboard/kontron/986lcd-m/Kconfig
index e8b7225..29d4da4 100644
--- a/src/mainboard/kontron/986lcd-m/Kconfig
+++ b/src/mainboard/kontron/986lcd-m/Kconfig
@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CHECK_SLFRCS_ON_RESUME
select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_WINBOND_W83627THG
+ select EARLY_CBMEM_INIT
select HAVE_ACPI_TABLES
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index 324f442..1875a10 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -22,6 +22,7 @@
#include <stdint.h>
#include <string.h>
#include <lib.h>
+#include <cbmem.h>
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
@@ -314,12 +315,11 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32;
}
-#include <cbmem.h>
-
void main(unsigned long bist)
{
u32 reg32;
int boot_mode = 0;
+ int cbmem_was_initted;
if (bist == 0)
enable_lapic();
@@ -410,11 +410,13 @@ void main(unsigned long bist)
MCHBAR16(SSKPD) = 0xCAFE;
+ cbmem_was_initted = !cbmem_initialize();
+
#if CONFIG_HAVE_ACPI_RESUME
/* If there is no high memory area, we didn't boot before, so
* this is not a resume. In that case we just create the cbmem toc.
*/
- if ((boot_mode == 2) && cbmem_reinit()) {
+ if ((boot_mode == 2) && cbmem_was_initted) {
void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
/* copy 1MB - 64K to high tables ram_base to prevent memory corruption
diff --git a/src/mainboard/roda/rk886ex/Kconfig b/src/mainboard/roda/rk886ex/Kconfig
index 2113deb..365980e 100644
--- a/src/mainboard/roda/rk886ex/Kconfig
+++ b/src/mainboard/roda/rk886ex/Kconfig
@@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
+ select EARLY_CBMEM_INIT
select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_1024
diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index cb141f9..e08c1c0 100644
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -28,6 +28,7 @@
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <lib.h>
+#include <cbmem.h>
#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include <cpu/x86/bist.h>
@@ -249,12 +250,11 @@ static void init_artec_dongle(void)
outb(0xf4, 0x88);
}
-#include <cbmem.h>
-
void main(unsigned long bist)
{
u32 reg32;
int boot_mode = 0;
+ int cbmem_was_initted;
if (bist == 0)
enable_lapic();
@@ -346,11 +346,13 @@ void main(unsigned long bist)
MCHBAR16(SSKPD) = 0xCAFE;
+ cbmem_was_initted = !cbmem_initialize();
+
#if CONFIG_HAVE_ACPI_RESUME
/* If there is no high memory area, we didn't boot before, so
* this is not a resume. In that case we just create the cbmem toc.
*/
- if ((boot_mode == 2) && cbmem_reinit()) {
+ if ((boot_mode == 2) && cbmem_was_initted) {
void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
/* copy 1MB - 64K to high tables ram_base to prevent memory corruption
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