[coreboot-gerrit] New patch to review for coreboot: 972c32d AMD IMC AGESA: Access the data in stack by correct length.

[Zheng Bao (zheng.bao@amd.com)]

Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4297

-gerrit

commit 972c32d9ea77447c53874ec46c0616bd0e74503a
Author: Zheng Bao <fishbaozi at gmail.com>
Date:   Fri Nov 29 21:06:53 2013 +0800

    AMD IMC AGESA: Access the data in stack by correct length.
    
    The values of AccessWidthxx are
    { AccessWidth8 = 1,
      AccessWidth16,
      AccessWidth32,}
    For the case of AccessWidth8, we only need to access the index/data
    once. But ReadECmsg and WriteECmsg did the loop 1 more time than they
    are supposed to do. So did the 16-bit and 32-bits accessing. The data
    in stack next to "Value" will be overwritten.
    
    That is an AGESA bug. We need to push this issue back to AMD's team
    to fix that.
    
    Change-Id: I566f74c242ce93f4569eedf69ca07d2fb7fb368d
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: Zheng Bao <fishbaozi at gmail.com>
---
 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLib.c   | 4 ++--
 src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcLib.c | 4 ++--
 src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/ImcLib.c | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLib.c
index 1a3f7dd..da85390 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLib.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLib.c
@@ -58,7 +58,7 @@ WriteECmsg (
   OpFlag = OpFlag & 0x7f;
   if (OpFlag == 0x02) OpFlag = 0x03;
 
-  for (Index = 0; Index <= OpFlag; Index++) {
+  for (Index = 0; Index < OpFlag; Index++) {
     /// EC_LDN9_MAILBOX_BASE_ADDRESS
     LibAmdIoWrite (AccessWidth8, 0x3E, &Address, StdHeader);
     Address++;
@@ -80,7 +80,7 @@ ReadECmsg (
   OpFlag = OpFlag & 0x7f;
   if (OpFlag == 0x02) OpFlag = 0x03;
 
-  for (Index = 0; Index <= OpFlag; Index++) {
+  for (Index = 0; Index < OpFlag; Index++) {
     /// EC_LDN9_MAILBOX_BASE_ADDRESS
     LibAmdIoWrite (AccessWidth8, 0x3E, &Address, StdHeader);
     Address++;
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcLib.c b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcLib.c
index a451c41..10f8dfc 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcLib.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcLib.c
@@ -60,7 +60,7 @@ WriteECmsg (
     OpFlag = 0x03;
   }
 
-  for (Index = 0; Index <= OpFlag; Index++) {
+  for (Index = 0; Index < OpFlag; Index++) {
     /// EC_LDN9_MAILBOX_BASE_ADDRESS
     LibAmdIoWrite (AccessWidth8, 0x3E, &Address, StdHeader);
     Address++;
@@ -84,7 +84,7 @@ ReadECmsg (
     OpFlag = 0x03;
   }
 
-  for (Index = 0; Index <= OpFlag; Index++) {
+  for (Index = 0; Index < OpFlag; Index++) {
     /// EC_LDN9_MAILBOX_BASE_ADDRESS
     LibAmdIoWrite (AccessWidth8, 0x3E, &Address, StdHeader);
     Address++;
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/ImcLib.c b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/ImcLib.c
index 05f5727..5490cf5 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/ImcLib.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/ImcLib.c
@@ -71,7 +71,7 @@ WriteECmsg (
     OpFlag = 0x03;
   }
 
-  for (Index = 0; Index <= OpFlag; Index++) {
+  for (Index = 0; Index < OpFlag; Index++) {
     /// EC_LDN9_MAILBOX_BASE_ADDRESS
     LibAmdIoWrite (AccessWidth8, MailBoxPort, &Address, StdHeader);
     Address++;
@@ -106,7 +106,7 @@ ReadECmsg (
     OpFlag = 0x03;
   }
 
-  for (Index = 0; Index <= OpFlag; Index++) {
+  for (Index = 0; Index < OpFlag; Index++) {
     /// EC_LDN9_MAILBOX_BASE_ADDRESS
     LibAmdIoWrite (AccessWidth8, MailBoxPort, &Address, StdHeader);
     Address++;