[coreboot-gerrit] Patch merged into coreboot/master: c593999 lynxpoint: Enable extra 16 IOAPIC entries for GPIO PIRQ

gerrit at coreboot.org gerrit at coreboot.org
Mon Nov 25 23:38:42 CET 2013

the following patch was just integrated into master:
commit c593999a0ad9b9f19c8171f6229faa191d055491
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Fri May 24 11:06:49 2013 -0700

    lynxpoint: Enable extra 16 IOAPIC entries for GPIO PIRQ
    LynxPoint-LP has an additional 16 entries in the IOAPIC that
    can be assigned to specific GPIOs when they are configured
    as PIRQ.
    The maximum redirection entries field in the IOAPIC needs to
    be set to 0x27 when this is enabled.
    Additionally specific GPIOs need to be routed to PIRQ so they
    interrupt via the IOAPIC instead of the GPIO IRQ 14/15.
    Change-Id: Ie587e1d203422ff6fb7fc5056d20a5ae66720991
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://gerrit.chromium.org/gerrit/56620
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/4203
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>

See http://review.coreboot.org/4203 for details.


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