[coreboot-gerrit] Patch merged into coreboot/master: 90bfbfa slippy: Update interrupt routing

gerrit at coreboot.org gerrit at coreboot.org
Sun Nov 24 06:22:52 CET 2013

the following patch was just integrated into master:
commit 90bfbfa9bae901d006b5933d26fad3c7185170fc
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue May 21 08:05:39 2013 -0700

    slippy: Update interrupt routing
    The SerialIO devices have specific requirements for PCI
    interrupt mode to use PIRQ{E,F,G,H} that are not being met.
    D21:F0 uses PIRQE, which must not be shared with other PCH
    D21:F1-F6 share PIRQF, which must not be shared with other PCH
    D23:F0 uses PIRQH, which must not be shared with other PCH
    - Fix D20IR -> D20IP typo
    - Remove D25/EHCI2 as it does not exist
    - Reorder other interrupts to clear PIRQE/PIRQF/PIRQH
    Check device interrupts in the kernel
    0:      IO-APIC-edge    timer
    1:      IO-APIC-edge    i8042
    8:      IO-APIC-edge    rtc0
    9:      IO-APIC-fasteoi acpi
    16:     IO-APIC-fasteoi ath9k
    18:     IO-APIC-fasteoi i801_smbus
    19:     IO-APIC-fasteoi ehci_hcd:usb1
    21:     IO-APIC-fasteoi i2c-designware-pci--1, i2c-designware-pci--1
    40:     PCI-MSI-edge    PCIe PME
    41:     PCI-MSI-edge    i915
    42:     PCI-MSI-edge    ahci
    43:     PCI-MSI-edge    xhci_hcd
    44:     PCI-MSI-edge    snd_hda_intel
    Change-Id: Id4c08d11d2860f270c6387138acdc7d3d83a85b5
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://gerrit.chromium.org/gerrit/56028
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/4176
    Tested-by: build bot (Jenkins)
    Reviewed-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>

See http://review.coreboot.org/4176 for details.


More information about the coreboot-gerrit mailing list