[coreboot-gerrit] New patch to review for coreboot: e1f790c peppy: Add 2GB DRAM configuration.
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Wed Nov 20 02:22:07 CET 2013
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4238
-gerrit
commit e1f790c2cc11c545cca579769afdb8c7787848de
Author: Shawn Nematbakhsh <shawnn at google.com>
Date: Thu Jun 13 19:47:47 2013 -0700
peppy: Add 2GB DRAM configuration.
Currently, all Peppy boards w/ '000' SPD GPIOs have 2GB DRAM. Disable
the second DRAM channel based upon the GPIOs.
Need to change / confirm this for upcoming builds.
Change-Id: I7085ddecb80626cc0bed99ba7b174c6b80350696
Reviewed-on: https://gerrit.chromium.org/gerrit/58620
Commit-Queue: Shawn Nematbakhsh <shawnn at chromium.org>
Reviewed-by: Shawn Nematbakhsh <shawnn at chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn at chromium.org>
---
src/mainboard/google/peppy/romstage.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/mainboard/google/peppy/romstage.c b/src/mainboard/google/peppy/romstage.c
index 46c4f0b..bb65f00 100644
--- a/src/mainboard/google/peppy/romstage.c
+++ b/src/mainboard/google/peppy/romstage.c
@@ -92,6 +92,12 @@ static void copy_spd(struct pei_data *peid)
if (spd_file->len < sizeof(peid->spd_data[0]))
die("Missing SPD data.");
+ /* Index 0 is 2GB config with CH0 only. This is suject to change.
+ * TODO(shawnn): Check the decoding before next build.
+ */
+ if (spd_index == 0)
+ peid->dimm_channel1_disabled = 3;
+
memcpy(peid->spd_data[0],
((char*)CBFS_SUBHEADER(spd_file)) +
spd_index * sizeof(peid->spd_data[0]),
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