[coreboot-gerrit] New patch to review for coreboot: 0115898 AMD hudson: add imc fan control

[WANG Siyuan (wangsiyuanbuaa@gmail.com)]

WANG Siyuan (wangsiyuanbuaa at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4023

-gerrit

commit 0115898369726593ff6e484504cbe2ece283e1fa
Author: WANG Siyuan <wangsiyuanbuaa at gmail.com>
Date:   Mon Nov 4 17:49:07 2013 +0800

    AMD hudson: add imc fan control
    
    Add fan control related registers initialization in southbridge.
    
    Change-Id: Iaf287aeb84b033f14620fad76665d74f5551fe7e
    Signed-off-by: WANG Siyuan <SiYuan.Wang at amd.com>
    Signed-off-by: WANG Siyuan <wangsiyuanbuaa at gmail.com>
---
 src/southbridge/amd/agesa/hudson/Makefile.inc |  1 +
 src/southbridge/amd/agesa/hudson/imc.c        | 40 +++++++++++++++++++++++++++
 src/southbridge/amd/agesa/hudson/imc.h        | 14 ++++++++++
 3 files changed, 55 insertions(+)

diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc
index d50d09e..3d4d995 100644
--- a/src/southbridge/amd/agesa/hudson/Makefile.inc
+++ b/src/southbridge/amd/agesa/hudson/Makefile.inc
@@ -9,6 +9,7 @@ ramstage-y += hda.c
 ramstage-y += pci.c
 ramstage-y += pcie.c
 ramstage-y += sd.c
+ramstage-y += imc.c
 
 ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
 ramstage-y += reset.c
diff --git a/src/southbridge/amd/agesa/hudson/imc.c b/src/southbridge/amd/agesa/hudson/imc.c
new file mode 100644
index 0000000..57b3fee
--- /dev/null
+++ b/src/southbridge/amd/agesa/hudson/imc.c
@@ -0,0 +1,40 @@
+#include "imc.h"
+#include "amdlib.h"
+
+void imc_fan_control(void)
+{
+	write8(ACPI_MMIO_BASE + PMIO2_BASE + 0x00, 0x06);
+	write8(ACPI_MMIO_BASE + PMIO2_BASE + 0x01, 0x06);
+	write8(ACPI_MMIO_BASE + PMIO2_BASE + 0x02, 0xf7);
+	write8(ACPI_MMIO_BASE + PMIO2_BASE + 0x03, 0xff);
+	write8(ACPI_MMIO_BASE + PMIO2_BASE + 0x04, 0xff);
+
+#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
+	write8(ACPI_MMIO_BASE + PMIO2_BASE + 0x10, 0x06);
+	write8(ACPI_MMIO_BASE + PMIO2_BASE + 0x11, 0x06);
+	write8(ACPI_MMIO_BASE + PMIO2_BASE + 0x12, 0xf7);
+	write8(ACPI_MMIO_BASE + PMIO2_BASE + 0x13, 0xff);
+	write8(ACPI_MMIO_BASE + PMIO2_BASE + 0x14, 0xff);
+#endif
+
+#if CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
+	UINT8                        PciData;
+	PCI_ADDR                      PciAddress;
+	AMD_CONFIG_PARAMS             StdHeader;
+	PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 0x3, 0x1E4);
+	LibAmdPciRead(AccessWidth8, PciAddress, &PciData, &StdHeader);
+	PciData &= (UINT8)0x8F;
+	PciData |= 0x10;
+	LibAmdPciWrite(AccessWidth8, PciAddress, &PciData, &StdHeader);
+#endif
+
+	imc_func_0x83();
+	imc_func_0x85();
+	imc_func_0x81();
+}
+
+void write_imc_msg(u8 idx, u8 val)
+{
+	outb(idx, 0x3e);
+	outb(val, 0x3f);
+}
diff --git a/src/southbridge/amd/agesa/hudson/imc.h b/src/southbridge/amd/agesa/hudson/imc.h
new file mode 100644
index 0000000..c7a134b
--- /dev/null
+++ b/src/southbridge/amd/agesa/hudson/imc.h
@@ -0,0 +1,14 @@
+#ifndef _IMC_FAN_CONTROL_H_
+#define _IMC_FAN_CONTROL_H_
+
+#include <arch/io.h>
+#include "FchPlatform.h"
+
+void imc_fan_control(void);
+void write_imc_msg(u8 idx, u8 val);
+void imc_func_0x81(void);
+void imc_func_0x83(void);
+void imc_func_0x85(void);
+void imc_func_0x89(void);
+
+#endif