[coreboot-gerrit] New patch to review for coreboot: 827cd29 fam15tn: Fix IOMMU scratch support in AGESA

Rudolf Marek (r.marek@assembler.cz) gerrit at coreboot.org
Mon May 27 17:05:35 CEST 2013


Rudolf Marek (r.marek at assembler.cz) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3316

-gerrit

commit 827cd29dcca6447a5e85b4e137381c4fe9848a1d
Author: Rudolf Marek <r.marek at assembler.cz>
Date:   Mon May 27 16:00:25 2013 +0200

    fam15tn: Fix IOMMU scratch support in AGESA
    
    The IOMMU support is broken and would not even compile otherwise.
    Just add header file and fix the 64bit versus 32bit address issue.
    
    Change-Id: I1924a113af12b186edcdf1956cb5ec5453aee34c
    Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
---
 src/cpu/amd/agesa/family15tn/Makefile.inc          |  1 +
 src/vendorcode/amd/agesa/f15tn/Makefile.inc        |  1 +
 .../GNB/Modules/GnbIommuScratch/GnbIommuScratch.c  |  8 ++-
 .../GNB/Modules/GnbIommuScratch/GnbIommuScratch.h  | 81 ++++++++++++++++++++++
 4 files changed, 90 insertions(+), 1 deletion(-)

diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc
index 372113e..815ab48 100644
--- a/src/cpu/amd/agesa/family15tn/Makefile.inc
+++ b/src/cpu/amd/agesa/family15tn/Makefile.inc
@@ -203,6 +203,7 @@ agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c
 agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbSbLib/GnbSbPcie.c
 agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbSview/GnbSview.c
 agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbTable/GnbTable.c
+agesa_lib_src += $(AGESA_ROOT)/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c
 agesa_lib_src += $(AGESA_ROOT)/Proc/HT/Fam15Mod1x/htNbFam15Mod1x.c
 agesa_lib_src += $(AGESA_ROOT)/Proc/HT/Fam15Mod1x/htNbUtilitiesFam15Mod1x.c
 agesa_lib_src += $(AGESA_ROOT)/Proc/HT/htFeat.c
diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
index f90e7b1..3fe0ff0 100644
--- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
@@ -78,6 +78,7 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbIvrsLib
 AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbSbIommuLib
 AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbTable
 AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV4
+AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbIommuScratch
 AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch
 AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch/Common
 AGESA_INC += -I$(AGESA_ROOT)/Proc/IDS/Debug
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c
index b5eb7ed..22d6457 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c
@@ -84,6 +84,7 @@
 #include  "GnbRegistersTN.h"
 #include  "heapManager.h"
 #include  "Filecode.h"
+#include  "GnbIommuScratch.h"
 #define FILECODE PROC_GNB_MODULES_GNBIOMMUSCRATCH_GNBIOMMUSCRATCH_FILECODE
 /*----------------------------------------------------------------------------------------
  *                   D E F I N I T I O N S    A N D    M A C R O S
@@ -138,9 +139,14 @@ GnbIommuScratchMemoryRangeInterface (
     return AGESA_FATAL;
   }
 
+  /* align the address to 64 bytes boundary */
+#ifdef __x86_64__
   AddressLow = (((UINT32) ((UINT64) AllocHeapParams.BufferPtr)) + 0x3F) & D0F0x98_x27_IOMMUUrAddr_31_6__MASK;
   AddressHigh = ((UINT32) (((UINT64) AllocHeapParams.BufferPtr) >> 32)) & D0F0x98_x26_IOMMUUrAddr_39_32__MASK;
-
+#else
+  AddressLow = ((((UINT32) AllocHeapParams.BufferPtr)) + 0x3F) & D0F0x98_x27_IOMMUUrAddr_31_6__MASK;
+  AddressHigh = 0;
+#endif
   GnbHandle = GnbGetHandle (StdHeader);
   while (GnbHandle != NULL) {
     if (GnbFmCheckIommuPresent (GnbHandle, StdHeader)) {
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h
new file mode 100644
index 0000000..d300fb6
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h
@@ -0,0 +1,81 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * IOMMU scratch page
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision:  $   @e \$Date:  $
+ *
+ */
+/*
+*****************************************************************************
+*
+* Copyright 2008 - 2012 ADVANCED MICRO DEVICES, INC.  All Rights Reserved.
+*
+* AMD is granting you permission to use this software (the Materials)
+* pursuant to the terms and conditions of your Software License Agreement
+* with AMD.  This header does *NOT* give you permission to use the Materials
+* or any rights under AMD's intellectual property.  Your use of any portion
+* of these Materials shall constitute your acceptance of those terms and
+* conditions.  If you do not agree to the terms and conditions of the Software
+* License Agreement, please do not use any portion of these Materials.
+*
+* CONFIDENTIALITY:  The Materials and all other information, identified as
+* confidential and provided to you by AMD shall be kept confidential in
+* accordance with the terms and conditions of the Software License Agreement.
+*
+* LIMITATION OF LIABILITY: THE MATERIALS AND ANY OTHER RELATED INFORMATION
+* PROVIDED TO YOU BY AMD ARE PROVIDED "AS IS" WITHOUT ANY EXPRESS OR IMPLIED
+* WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, TITLE, FITNESS FOR ANY PARTICULAR PURPOSE,
+* OR WARRANTIES ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE.
+* IN NO EVENT SHALL AMD OR ITS LICENSORS BE LIABLE FOR ANY DAMAGES WHATSOEVER
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+* THE ABOVE LIMITATION MAY NOT APPLY TO YOU.
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+* AMD does not assume any responsibility for any errors which may appear in
+* the Materials or any other related information provided to you by AMD, or
+* result from use of the Materials or any related information.
+*
+* You agree that you will not reverse engineer or decompile the Materials.
+*
+* NO SUPPORT OBLIGATION: AMD is not obligated to furnish, support, or make any
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+* available to you.  Additionally, AMD retains the right to modify the
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+* U.S. GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with
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+* DFAR252.227-7013, et seq., or its successor.  Use of the Materials by the
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+* ***************************************************************************
+*
+*/
+
+#ifndef _GNBIOMMUSCRATCH_H_
+#define _GNBIOMMUSCRATCH_H_
+
+AGESA_STATUS
+GnbIommuScratchMemoryRangeInterface (
+  IN       AMD_CONFIG_PARAMS        *StdHeader
+  );
+
+#endif



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