[coreboot-gerrit] Patch merged into coreboot/master: 0da9286 intel/gm45: Fix interpretation of VT-d disable bit

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 0da92863a754828eb807f1a15927f0dc288a1788
Author: Nico Huber <nico.huber at secunet.com>
Date:   Tue May 14 11:02:43 2013 +0200

    intel/gm45: Fix interpretation of VT-d disable bit
    
    When configuring the GTT size for the integrated graphics, the state
    of VT-d was read wrong. Bit 48 of CAPID0 (D0F0) is set when VT-d is
    _disabled_.
    
    In the log of a VT-d enabled roda/rk9 we have now:
    
    [...]
    VT-d enabled
    [...]
    IGD decoded, subtracting 32M UMA and 4M GTT
    [...]
    
    Without this patch, only 2M GTT were reported.
    
    Change-Id: I87582c18f4769c2a05be86936d865c0d1fb35966
    Signed-off-by: Nico Huber <nico.huber at secunet.com>
    Reviewed-on: http://review.coreboot.org/3252
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/3252 for details.

-gerrit