[coreboot-gerrit] Patch merged into coreboot/master: b8b3e8b Asus M4A785T-M: Add CMOS defaults.

gerrit at coreboot.org gerrit at coreboot.org
Fri May 10 17:27:06 CEST 2013


the following patch was just integrated into master:
commit b8b3e8bff32ee7dddcacec11e015f6683783eb2f
Author: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
Date:   Thu May 9 16:14:59 2013 +0200

    Asus M4A785T-M: Add CMOS defaults.
    
    After removing power and the CMOS Battery, putting it back
      and booting coreboot we have:
        # ./nvramtool -a
        boot_option = Fallback
        last_boot = Fallback
        ECC_memory = Enable
        baud_rate = 115200
        hw_scrubber = Enable
        interleave_chip_selects = Enable
        max_mem_clock = 400Mhz
        multi_core = Enable
        power_on_after_fail = Disable
        debug_level = Spew
        boot_first = HDD
        boot_second = Fallback_Floppy
        boot_third = Fallback_Network
        boot_index = 0xf
        boot_countdown = 0xc
        slow_cpu = off
        nmi = Enable
        iommu = Enable
        nvramtool: Can not read coreboot parameter user_data because layout info specifies CMOS area that is too wide.
        nvramtool: Warning: Coreboot CMOS checksum is bad.
    
    Change-Id: Ifa09c7a468e3e0713b426763266ae633e67d8397
    Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
    Reviewed-on: http://review.coreboot.org/3224
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>


See http://review.coreboot.org/3224 for details.

-gerrit



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