[coreboot-gerrit] Patch set updated for coreboot: 0c9d045 resources: introduce IORESOURCE_WRCOMB

Aaron Durbin (adurbin@google.com) gerrit at coreboot.org
Wed Mar 27 03:33:35 CET 2013


Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2891

-gerrit

commit 0c9d0453e67cd8e238b08b63a6ebf07339fd3ad2
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Fri Mar 22 22:16:58 2013 -0500

    resources: introduce IORESOURCE_WRCOMB
    
    Certain MMIO resources can be set to a write-combining cacheable
    mode to increase performance. Typical resources that use this would
    be graphics memory.
    
    Change-Id: Icd96c720f86f7e2f19a6461bb23cb323124eb68e
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/include/device/resource.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/include/device/resource.h b/src/include/device/resource.h
index 6b66605..4bd9698 100644
--- a/src/include/device/resource.h
+++ b/src/include/device/resource.h
@@ -21,7 +21,7 @@
 						 * to the bus below.
 						 */
 #define IORESOURCE_BRIDGE	0x00080000	/* The IO resource has a bus below it. */
-
+#define IORESOURCE_WRCOMB	0x00100000	/* Write combining resource. */
 #define IORESOURCE_RESERVE	0x10000000	/* The resource needs to be reserved in the coreboot table */
 #define IORESOURCE_STORED	0x20000000	/* The IO resource assignment has been stored in the device */
 #define IORESOURCE_ASSIGNED	0x40000000	/* An IO resource that has been assigned a value */



More information about the coreboot-gerrit mailing list