[coreboot-gerrit] Patch merged into coreboot/master: c00457d romstage_handoff: add s3_resume field

gerrit at coreboot.org gerrit at coreboot.org
Thu Mar 21 22:49:50 CET 2013

the following patch was just integrated into master:
commit c00457d065a0b57e8e2e8abc9318fc6e1198ee64
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Mon Feb 11 21:15:12 2013 -0600

    romstage_handoff: add s3_resume field
    Provide a field in the romstage_handoff structure to indicate if the
    current boot is an ACPI S3 wake boot. There are currently quite a few
    non-standardized ways of passing this knowledge to ramstage from
    romstage. Many utilize stashing magic numbers in device-specific
    registers. The addition of this field adds a more formalized method
    passing along this information. However, it still requires the romstage
    chipset code to initialize this field. In short, this change does not
    make this a hard requirement for ramstage.
    Change-Id: Ia819c0ceed89ed427ef576a036fa870eb7cf57bc
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/2796
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>

Build-Tested: build bot (Jenkins) at Tue Mar 19 05:06:49 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Thu Mar 21 22:49:49 2013, giving +2
See http://review.coreboot.org/2796 for details.


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