[coreboot-gerrit] Patch set updated for coreboot: 6ffa11d Add simple_pcidev_t and simple_pnpdev_t
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Thu Jun 27 01:37:16 CEST 2013
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3508
-gerrit
commit 6ffa11dc84592cd368f6bc7d689f00de38f70f50
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Thu Jun 20 20:25:21 2013 +0300
Add simple_pcidev_t and simple_pnpdev_t
Declare the functions that may be used in both romstage and ramstage
to use simple_device_t instead. This will later allow to define PCI access
functions for ramstage using the inlined functions from romstage.
Change-Id: I32ff622883ceee4628e6b1b01023b970e379113f
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/arch/x86/include/arch/io.h | 50 ++++++++++++++++++++------------
src/arch/x86/include/arch/pci_io_cfg.h | 12 ++++----
src/arch/x86/include/arch/pci_mmio_cfg.h | 18 ++++++------
src/include/device/device.h | 2 ++
4 files changed, 48 insertions(+), 34 deletions(-)
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 82f83c8..de4e1e3 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -206,7 +206,11 @@ static inline int log2f(int value)
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
-typedef unsigned device_t; /* pci and pci_mmio need to have different ways to have dev */
+typedef unsigned int simple_pcidev_t;
+typedef unsigned int simple_pnpdev_t;
+
+/* FIXME: Sources for devices need still use device_t. */
+typedef unsigned int device_t;
/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G,
* We don't need to set %fs, and %gs anymore
@@ -216,25 +220,26 @@ typedef unsigned device_t; /* pci and pci_mmio need to have different ways to ha
#include <arch/pci_io_cfg.h>
#include <arch/pci_mmio_cfg.h>
-#include <arch/pci_mmio_cfg.h>
-
-static inline __attribute__((always_inline)) void pci_or_config8(device_t dev, unsigned where, uint8_t value)
+static inline __attribute__((always_inline))
+void pci_or_config8(simple_pcidev_t dev, unsigned where, uint8_t value)
{
pci_write_config8(dev, where, pci_read_config8(dev, where) | value);
}
-static inline __attribute__((always_inline)) void pci_or_config16(device_t dev, unsigned where, uint16_t value)
+static inline __attribute__((always_inline))
+void pci_or_config16(simple_pcidev_t dev, unsigned where, uint16_t value)
{
pci_write_config16(dev, where, pci_read_config16(dev, where) | value);
}
-static inline __attribute__((always_inline)) void pci_or_config32(device_t dev, unsigned where, uint32_t value)
+static inline __attribute__((always_inline))
+void pci_or_config32(simple_pcidev_t dev, unsigned where, uint32_t value)
{
pci_write_config32(dev, where, pci_read_config32(dev, where) | value);
}
#define PCI_DEV_INVALID (0xffffffffU)
-static inline device_t pci_io_locate_device(unsigned pci_id, device_t dev)
+static inline simple_pcidev_t pci_io_locate_device(unsigned pci_id, simple_pcidev_t dev)
{
for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
unsigned int id;
@@ -246,7 +251,7 @@ static inline device_t pci_io_locate_device(unsigned pci_id, device_t dev)
return PCI_DEV_INVALID;
}
-static inline device_t pci_locate_device(unsigned pci_id, device_t dev)
+static inline simple_pcidev_t pci_locate_device(unsigned pci_id, simple_pcidev_t dev)
{
for(; dev <= PCI_DEV(255|(((1<<CONFIG_PCI_BUS_SEGN_BITS)-1)<<8), 31, 7); dev += PCI_DEV(0,0,1)) {
unsigned int id;
@@ -258,9 +263,9 @@ static inline device_t pci_locate_device(unsigned pci_id, device_t dev)
return PCI_DEV_INVALID;
}
-static inline device_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
+static inline simple_pcidev_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
{
- device_t dev, last;
+ simple_pcidev_t dev, last;
dev = PCI_DEV(bus, 0, 0);
last = PCI_DEV(bus, 31, 7);
@@ -276,53 +281,60 @@ static inline device_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
}
/* Generic functions for pnp devices */
-static inline __attribute__((always_inline)) void pnp_write_config(device_t dev, uint8_t reg, uint8_t value)
+static inline __attribute__((always_inline)) void pnp_write_config(simple_pnpdev_t dev, uint8_t reg, uint8_t value)
{
unsigned port = dev >> 8;
outb(reg, port );
outb(value, port +1);
}
-static inline __attribute__((always_inline)) uint8_t pnp_read_config(device_t dev, uint8_t reg)
+static inline __attribute__((always_inline)) uint8_t pnp_read_config(simple_pnpdev_t dev, uint8_t reg)
{
unsigned port = dev >> 8;
outb(reg, port);
return inb(port +1);
}
-static inline __attribute__((always_inline)) void pnp_set_logical_device(device_t dev)
+static inline __attribute__((always_inline))
+void pnp_set_logical_device(simple_pnpdev_t dev)
{
unsigned device = dev & 0xff;
pnp_write_config(dev, 0x07, device);
}
-static inline __attribute__((always_inline)) void pnp_set_enable(device_t dev, int enable)
+static inline __attribute__((always_inline))
+void pnp_set_enable(simple_pnpdev_t dev, int enable)
{
pnp_write_config(dev, 0x30, enable?0x1:0x0);
}
-static inline __attribute__((always_inline)) int pnp_read_enable(device_t dev)
+static inline __attribute__((always_inline))
+int pnp_read_enable(simple_pnpdev_t dev)
{
return !!pnp_read_config(dev, 0x30);
}
-static inline __attribute__((always_inline)) void pnp_set_iobase(device_t dev, unsigned index, unsigned iobase)
+static inline __attribute__((always_inline))
+void pnp_set_iobase(simple_pnpdev_t dev, unsigned index, unsigned iobase)
{
pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
pnp_write_config(dev, index + 1, iobase & 0xff);
}
-static inline __attribute__((always_inline)) uint16_t pnp_read_iobase(device_t dev, unsigned index)
+static inline __attribute__((always_inline))
+uint16_t pnp_read_iobase(simple_pnpdev_t dev, unsigned index)
{
return ((uint16_t)(pnp_read_config(dev, index)) << 8) | pnp_read_config(dev, index + 1);
}
-static inline __attribute__((always_inline)) void pnp_set_irq(device_t dev, unsigned index, unsigned irq)
+static inline __attribute__((always_inline))
+void pnp_set_irq(simple_pnpdev_t dev, unsigned index, unsigned irq)
{
pnp_write_config(dev, index, irq);
}
-static inline __attribute__((always_inline)) void pnp_set_drq(device_t dev, unsigned index, unsigned drq)
+static inline __attribute__((always_inline))
+void pnp_set_drq(simple_pnpdev_t dev, unsigned index, unsigned drq)
{
pnp_write_config(dev, index, drq & 0xff);
}
diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h
index 63e6a07..b863bc7 100644
--- a/src/arch/x86/include/arch/pci_io_cfg.h
+++ b/src/arch/x86/include/arch/pci_io_cfg.h
@@ -19,7 +19,7 @@
#define _PCI_IO_CFG_H
static inline __attribute__((always_inline))
-uint8_t pci_io_read_config8(device_t dev, unsigned where)
+uint8_t pci_io_read_config8(simple_pcidev_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
@@ -32,7 +32,7 @@ uint8_t pci_io_read_config8(device_t dev, unsigned where)
}
static inline __attribute__((always_inline))
-uint16_t pci_io_read_config16(device_t dev, unsigned where)
+uint16_t pci_io_read_config16(simple_pcidev_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
@@ -45,7 +45,7 @@ uint16_t pci_io_read_config16(device_t dev, unsigned where)
}
static inline __attribute__((always_inline))
-uint32_t pci_io_read_config32(device_t dev, unsigned where)
+uint32_t pci_io_read_config32(simple_pcidev_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
@@ -58,7 +58,7 @@ uint32_t pci_io_read_config32(device_t dev, unsigned where)
}
static inline __attribute__((always_inline))
-void pci_io_write_config8(device_t dev, unsigned where, uint8_t value)
+void pci_io_write_config8(simple_pcidev_t dev, unsigned where, uint8_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
@@ -71,7 +71,7 @@ void pci_io_write_config8(device_t dev, unsigned where, uint8_t value)
}
static inline __attribute__((always_inline))
-void pci_io_write_config16(device_t dev, unsigned where, uint16_t value)
+void pci_io_write_config16(simple_pcidev_t dev, unsigned where, uint16_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
@@ -84,7 +84,7 @@ void pci_io_write_config16(device_t dev, unsigned where, uint16_t value)
}
static inline __attribute__((always_inline))
-void pci_io_write_config32(device_t dev, unsigned where, uint32_t value)
+void pci_io_write_config32(simple_pcidev_t dev, unsigned where, uint32_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/arch/x86/include/arch/pci_mmio_cfg.h
index ea59670..e5c1fc6 100644
--- a/src/arch/x86/include/arch/pci_mmio_cfg.h
+++ b/src/arch/x86/include/arch/pci_mmio_cfg.h
@@ -24,7 +24,7 @@
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
static inline __attribute__ ((always_inline))
-u8 pcie_read_config8(device_t dev, unsigned int where)
+u8 pcie_read_config8(simple_pcidev_t dev, unsigned int where)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | where;
@@ -32,7 +32,7 @@ u8 pcie_read_config8(device_t dev, unsigned int where)
}
static inline __attribute__ ((always_inline))
-u16 pcie_read_config16(device_t dev, unsigned int where)
+u16 pcie_read_config16(simple_pcidev_t dev, unsigned int where)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | (where & ~1);
@@ -40,7 +40,7 @@ u16 pcie_read_config16(device_t dev, unsigned int where)
}
static inline __attribute__ ((always_inline))
-u32 pcie_read_config32(device_t dev, unsigned int where)
+u32 pcie_read_config32(simple_pcidev_t dev, unsigned int where)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | (where & ~3);
@@ -48,7 +48,7 @@ u32 pcie_read_config32(device_t dev, unsigned int where)
}
static inline __attribute__ ((always_inline))
-void pcie_write_config8(device_t dev, unsigned int where, u8 value)
+void pcie_write_config8(simple_pcidev_t dev, unsigned int where, u8 value)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | where;
@@ -56,7 +56,7 @@ void pcie_write_config8(device_t dev, unsigned int where, u8 value)
}
static inline __attribute__ ((always_inline))
-void pcie_write_config16(device_t dev, unsigned int where, u16 value)
+void pcie_write_config16(simple_pcidev_t dev, unsigned int where, u16 value)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | (where & ~1);
@@ -64,7 +64,7 @@ void pcie_write_config16(device_t dev, unsigned int where, u16 value)
}
static inline __attribute__ ((always_inline))
-void pcie_write_config32(device_t dev, unsigned int where, u32 value)
+void pcie_write_config32(simple_pcidev_t dev, unsigned int where, u32 value)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | (where & ~3);
@@ -72,21 +72,21 @@ void pcie_write_config32(device_t dev, unsigned int where, u32 value)
}
static inline __attribute__ ((always_inline))
-void pcie_or_config8(device_t dev, unsigned int where, u8 ormask)
+void pcie_or_config8(simple_pcidev_t dev, unsigned int where, u8 ormask)
{
u8 value = pcie_read_config8(dev, where);
pcie_write_config8(dev, where, value | ormask);
}
static inline __attribute__ ((always_inline))
-void pcie_or_config16(device_t dev, unsigned int where, u16 ormask)
+void pcie_or_config16(simple_pcidev_t dev, unsigned int where, u16 ormask)
{
u16 value = pcie_read_config16(dev, where);
pcie_write_config16(dev, where, value | ormask);
}
static inline __attribute__ ((always_inline))
-void pcie_or_config32(device_t dev, unsigned int where, u32 ormask)
+void pcie_or_config32(simple_pcidev_t dev, unsigned int where, u32 ormask)
{
u32 value = pcie_read_config32(dev, where);
pcie_write_config32(dev, where, value | ormask);
diff --git a/src/include/device/device.h b/src/include/device/device.h
index 9defb19..bcfe03b 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -10,6 +10,8 @@
struct device;
#ifndef __PRE_RAM__
typedef struct device * device_t;
+typedef unsigned int simple_pcidev_t;
+typedef unsigned int simple_pnpdev_t;
struct pci_operations;
struct pci_bus_operations;
struct smbus_bus_operations;
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