[coreboot-gerrit] New patch to review for coreboot: 54bee44 Three hunks which were missing on original 2065x commit

Vladimir Serbinenko (phcoder@gmail.com) gerrit at coreboot.org
Fri Jun 14 02:33:48 CEST 2013


Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3455

-gerrit

commit 54bee444eaf82df6b76b23032a8680202320cb1b
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Fri Jun 14 02:33:03 2013 +0200

    Three hunks which were missing on original 2065x commit
    
    Change-Id: I52f5890d577f1eb3a3512c2486484e5a19a5e03d
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/cpu/intel/model_2065x/Kconfig     | 2 +-
 src/cpu/intel/model_2065x/bootblock.c | 2 +-
 src/cpu/x86/lapic/lapic_cpu_init.c    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig
index 019309d..9d5806b 100644
--- a/src/cpu/intel/model_2065x/Kconfig
+++ b/src/cpu/intel/model_2065x/Kconfig
@@ -33,7 +33,7 @@ config ENABLE_VMX
 
 config MICROCODE_INCLUDE_PATH
 	string
-	default "3rdparty/mainboard/lenovo/x201"
+	default "src/cpu/intel/model_2065x"
 
 config XIP_ROM_SIZE
 	hex
diff --git a/src/cpu/intel/model_2065x/bootblock.c b/src/cpu/intel/model_2065x/bootblock.c
index 3bd0871..3fd3d14 100644
--- a/src/cpu/intel/model_2065x/bootblock.c
+++ b/src/cpu/intel/model_2065x/bootblock.c
@@ -30,7 +30,7 @@
 #include <southbridge/intel/ibexpeak/pch.h>
 #include "model_2065x.h"
 #else
-#error "CPU must be paired with Intel BD82X6X or C216 southbridge"
+#error "CPU must be paired with Intel Ibex Peak southbridge"
 #endif
 
 static void set_var_mtrr(
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index fbc8aa4..7f18c7c 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -141,7 +141,7 @@ static int lapic_start_cpu(unsigned long apicid)
 		}
 		return 0;
 	}
-#if !CONFIG_CPU_AMD_MODEL_10XXX && !CONFIG_CPU_INTEL_MODEL_206AX
+#if !CONFIG_CPU_AMD_MODEL_10XXX && !CONFIG_CPU_INTEL_MODEL_206AX && !CONFIG_CPU_INTEL_MODEL_2065X
 	mdelay(10);
 #endif
 



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