[coreboot-gerrit] Patch set updated for coreboot: 4e9bfe4 usbdebug: Support i82801dx/ex southbridge

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3381

-gerrit

commit 4e9bfe497988ebb8837df69127f60b5f3745111b
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Thu Jun 6 10:21:28 2013 +0300

    usbdebug: Support i82801dx/ex southbridge
    
    Tested on i82801dx system with board aopen/dxplplusu.
    
    Change-Id: I522455ac79c87b9b6fc9cd8c4dc0da3563dfbfad
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/southbridge/intel/i82801dx/Kconfig      | 13 +++++++++++++
 src/southbridge/intel/i82801dx/Makefile.inc |  3 +++
 src/southbridge/intel/i82801dx/usb2.c       |  3 ++-
 src/southbridge/intel/i82801ex/Kconfig      | 12 ++++++++++++
 src/southbridge/intel/i82801ex/Makefile.inc |  3 +++
 src/southbridge/intel/i82801ex/ehci.c       |  3 ++-
 6 files changed, 35 insertions(+), 2 deletions(-)

diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig
index bad9936..4a43458 100644
--- a/src/southbridge/intel/i82801dx/Kconfig
+++ b/src/southbridge/intel/i82801dx/Kconfig
@@ -24,3 +24,16 @@ config SOUTHBRIDGE_INTEL_I82801DX
 	select IOAPIC
 	select HAVE_HARD_RESET
 	select HAVE_SMI_HANDLER
+	select HAVE_USBDEBUG
+
+if SOUTHBRIDGE_INTEL_I82801DX
+
+config EHCI_BAR
+	hex
+	default 0xfef00000
+
+config EHCI_DEBUG_OFFSET
+	hex
+	default 0x80
+
+endif
diff --git a/src/southbridge/intel/i82801dx/Makefile.inc b/src/southbridge/intel/i82801dx/Makefile.inc
index e412ef9..061ddcc 100644
--- a/src/southbridge/intel/i82801dx/Makefile.inc
+++ b/src/southbridge/intel/i82801dx/Makefile.inc
@@ -33,3 +33,6 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
 
 romstage-y += early_smbus.c
+romstage-$(CONFIG_USBDEBUG) += ../i82801gx/usb_debug.c
+ramstage-$(CONFIG_USBDEBUG) += ../i82801gx/usb_debug.c
+smm-$(CONFIG_USBDEBUG) += ../i82801gx/usb_debug.c
diff --git a/src/southbridge/intel/i82801dx/usb2.c b/src/southbridge/intel/i82801dx/usb2.c
index a0ea5f6..5dd5866 100644
--- a/src/southbridge/intel/i82801dx/usb2.c
+++ b/src/southbridge/intel/i82801dx/usb2.c
@@ -24,6 +24,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
+#include <usbdebug.h>
 #include "i82801dx.h"
 
 static void usb2_init(struct device *dev)
@@ -38,7 +39,7 @@ static void usb2_init(struct device *dev)
 }
 
 static struct device_operations usb2_ops = {
-	.read_resources = pci_dev_read_resources,
+	.read_resources = pci_ehci_read_resources,
 	.set_resources = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init = usb2_init,
diff --git a/src/southbridge/intel/i82801ex/Kconfig b/src/southbridge/intel/i82801ex/Kconfig
index 23a68b8..b1d7dbb 100644
--- a/src/southbridge/intel/i82801ex/Kconfig
+++ b/src/southbridge/intel/i82801ex/Kconfig
@@ -2,4 +2,16 @@ config SOUTHBRIDGE_INTEL_I82801EX
 	bool
 	select IOAPIC
 	select HAVE_HARD_RESET
+	select HAVE_USBDEBUG
 
+if SOUTHBRIDGE_INTEL_I82801EX
+
+config EHCI_BAR
+	hex
+	default 0xfef00000
+
+config EHCI_DEBUG_OFFSET
+	hex
+	default 0xa0
+
+endif
diff --git a/src/southbridge/intel/i82801ex/Makefile.inc b/src/southbridge/intel/i82801ex/Makefile.inc
index fb76a98..3609fbe 100644
--- a/src/southbridge/intel/i82801ex/Makefile.inc
+++ b/src/southbridge/intel/i82801ex/Makefile.inc
@@ -9,3 +9,6 @@ ramstage-y += pci.c
 ramstage-y += ac97.c
 ramstage-y += watchdog.c
 ramstage-y += reset.c
+
+romstage-$(CONFIG_USBDEBUG) += ../i82801gx/usb_debug.c
+ramstage-$(CONFIG_USBDEBUG) += ../i82801gx/usb_debug.c
diff --git a/src/southbridge/intel/i82801ex/ehci.c b/src/southbridge/intel/i82801ex/ehci.c
index 8ae921d..045840a 100644
--- a/src/southbridge/intel/i82801ex/ehci.c
+++ b/src/southbridge/intel/i82801ex/ehci.c
@@ -3,6 +3,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
+#include <usbdebug.h>
 #include "i82801ex.h"
 
 static void ehci_init(struct device *dev)
@@ -34,7 +35,7 @@ static struct pci_operations lops_pci = {
 	.set_subsystem = &ehci_set_subsystem,
 };
 static struct device_operations ehci_ops  = {
-	.read_resources   = pci_dev_read_resources,
+	.read_resources   = pci_ehci_read_resources,
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = ehci_init,