[coreboot-gerrit] Patch set updated for coreboot: e3ee097 intel/*/usb_debug.c: Remove inclusion of unneeded PCH header
Paul Menzel (paulepanter@users.sourceforge.net)
gerrit at coreboot.org
Tue Jun 11 10:00:56 CEST 2013
Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3428
-gerrit
commit e3ee097f0c0784c39874eb5ab986cfe5b7a440a6
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date: Mon Jun 10 10:08:26 2013 +0200
intel/*/usb_debug.c: Remove inclusion of unneeded PCH header
Intel southbridges BD82x6x, 82801Gx and Lynx Point allow to use the
USB debug port in `usb_debug.c`. In commit
commit 5692c5733633bfb8b23f1111de152eff0233b713
Author: Patrick Georgi <patrick.georgi at coresystems.de>
Date: Tue Oct 5 13:40:31 2010 +0000
- move EHCI_BAR_INDEX to ehci.h - it's constant as per EHCI spec 2.3.1
- move EHCI_BAR and EHCI_DEBUG_OFFSET to Kconfig to be set by USB debug port enabled southbridges
- drop USB debug code includes from romstage.cs and use romstage-srcs in the build system instead
the following defines were moved.
-#define EHCI_BAR 0xFEF00000 /* EHCI BAR address */
-#define EHCI_BAR_INDEX 0x10 /* Hardwired 0x10 (>= ICH4). */
-#define EHCI_DEBUG_OFFSET 0xA0 /* Hardwired 0xa0 (>= ICH5). */
Additionally the header `i82801gx.h` was included, which was not
needed though as the defines were added to other headers.
$ git grep EHCI_BAR
[…]
src/include/ehci.h:#define EHCI_BAR_INDEX 0x10
[…]
src/southbridge/intel/i82801gx/Kconfig:config EHCI_BAR
[…]
$ git grep EHCI_DEBUG_OFFSET
[…]
src/southbridge/intel/i82801gx/Kconfig:config EHCI_DEBUG_OFFSET
[…]
In the aftermath the file was copied for new ports and the header
inclusion was just updated without checking if it was needed or not.
As the header inclusion is not needed, remove it.
Change-Id: I785fbde8d08c5d73c8ebbca08a2160cae6170144
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
src/southbridge/intel/bd82x6x/usb_debug.c | 1 -
src/southbridge/intel/i82801gx/usb_debug.c | 1 -
src/southbridge/intel/lynxpoint/usb_debug.c | 1 -
3 files changed, 3 deletions(-)
diff --git a/src/southbridge/intel/bd82x6x/usb_debug.c b/src/southbridge/intel/bd82x6x/usb_debug.c
index e075a76..0a85dce 100644
--- a/src/southbridge/intel/bd82x6x/usb_debug.c
+++ b/src/southbridge/intel/bd82x6x/usb_debug.c
@@ -24,7 +24,6 @@
#include <device/pci_def.h>
#ifdef __PRE_RAM__
-#include "pch.h"
void enable_usbdebug(unsigned int port)
{
diff --git a/src/southbridge/intel/i82801gx/usb_debug.c b/src/southbridge/intel/i82801gx/usb_debug.c
index f447f7b..10a308f3 100644
--- a/src/southbridge/intel/i82801gx/usb_debug.c
+++ b/src/southbridge/intel/i82801gx/usb_debug.c
@@ -25,7 +25,6 @@
#include <console/console.h>
#include <usbdebug.h>
#include <device/pci_def.h>
-#include "i82801gx.h"
/* Required for successful build, but currently empty. */
void set_debug_port(unsigned int port)
diff --git a/src/southbridge/intel/lynxpoint/usb_debug.c b/src/southbridge/intel/lynxpoint/usb_debug.c
index 785465b..f5e4eed 100644
--- a/src/southbridge/intel/lynxpoint/usb_debug.c
+++ b/src/southbridge/intel/lynxpoint/usb_debug.c
@@ -22,7 +22,6 @@
#include <console/console.h>
#include <usbdebug.h>
#include <device/pci_def.h>
-#include "pch.h"
/* Required for successful build, but currently empty. */
void set_debug_port(unsigned int port)
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