[coreboot-gerrit] New patch to review for coreboot: 5c00184 AMD S3 resume: Add framwork to write bigger data

[Siyuan Wang (wangsiyuanbuaa@gmail.com)]

Siyuan Wang (wangsiyuanbuaa at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3413

-gerrit

commit 5c001841fcd005ecef1567769d963ef34fdd907a
Author: Siyuan Wang <wangsiyuanbuaa at gmail.com>
Date:   Sat Jun 8 10:25:06 2013 +0800

    AMD S3 resume: Add framwork to write bigger data
    
    Some AMD boards can write bigger data when saving S3 info.
    In this patch, I use macro 'BIGGER_S3_DATA' to contral data size.
    
    Change-Id: Id984955d46eae487e39d45979f1a90054aa9f54b
    Signed-off-by: Siyuan Wang <SiYuan.Wang at amd.com>
    Signed-off-by: Siyuan Wang <wangsiyuanbuaa at gmail.com>
---
 src/cpu/amd/agesa/s3_resume.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c
index 8a9ffee..65f46bd 100644
--- a/src/cpu/amd/agesa/s3_resume.c
+++ b/src/cpu/amd/agesa/s3_resume.c
@@ -152,10 +152,15 @@ void write_mtrr(struct spi_flash *flash, u32 *p_nvram_pos, unsigned idx)
 {
 	msr_t  msr_data;
 	msr_data = rdmsr(idx);
+#ifdef BIGGER_S3_DATA
+	flash->write(flash, *p_nvram_pos, 8, &msr_data);
+	*p_nvram_pos += 8;
+#else
 	flash->write(flash, *p_nvram_pos, 4, &msr_data.lo);
 	*p_nvram_pos += 4;
 	flash->write(flash, *p_nvram_pos, 4, &msr_data.hi);
 	*p_nvram_pos += 4;
+#endif
 }
 #endif
 
@@ -264,10 +269,22 @@ u32 OemAgesaSaveS3Info(S3_DATA_TYPE S3DataType, u32 DataSize, void *Data)
 	nvram_pos = 0;
 	flash->write(flash, nvram_pos + pos, sizeof(DataSize), &DataSize);
 
+#ifdef BIGGER_S3_DATA
+
+#ifndef SPI_DATA_PACKET_SIZE
+#define SPI_DATA_PACKET_SIZE 0xF
+#endif
+	for (nvram_pos = 0; nvram_pos < DataSize - SPI_DATA_PACKET_SIZE; nvram_pos += SPI_DATA_PACKET_SIZE) {
+		data = *(u32 *) (Data + nvram_pos);
+		flash->write(flash, nvram_pos + pos + 4, SPI_DATA_PACKET_SIZE, (u8 *)(Data + nvram_pos));
+	}
+	flash->write(flash, nvram_pos + pos + 4, DataSize % SPI_DATA_PACKET_SIZE, (u8 *)(Data + nvram_pos));
+#else
 	for (nvram_pos = 0; nvram_pos < DataSize; nvram_pos += 4) {
 		data = *(u32 *) (Data + nvram_pos);
 		flash->write(flash, nvram_pos + pos + 4, sizeof(u32), (u32 *)(Data + nvram_pos));
 	}
+#endif
 
 	flash->spi->rw = SPI_WRITE_FLAG;
 	spi_release_bus(flash->spi);