[coreboot-gerrit] New patch to review for coreboot: 13c4ee1 Make acpi/ec.c usable in romstage

[Vladimir Serbinenko (phcoder@gmail.com)]

Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3405

-gerrit

commit 13c4ee1e3044b04df4c706b82e840b0de48271c3
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Fri Jun 7 01:55:57 2013 +0200

    Make acpi/ec.c usable in romstage
    
    On X201 to enable EHCI debug you need to go through EC if USB power is
    disabled so we need to inclue ec.c.
    
    Change-Id: I8f8b7de639ecaebceaa53cd338136befaeec8214
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/ec/acpi/Makefile.inc |  1 +
 src/ec/acpi/ec.c         | 13 +++++++++++++
 2 files changed, 14 insertions(+)

diff --git a/src/ec/acpi/Makefile.inc b/src/ec/acpi/Makefile.inc
index 34c5136..b39aaa2 100644
--- a/src/ec/acpi/Makefile.inc
+++ b/src/ec/acpi/Makefile.inc
@@ -1,2 +1,3 @@
 ramstage-y += ec.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += ec.c
+romstage-$(CONFIG_BOARD_LENOVO_X201) += ec.c
diff --git a/src/ec/acpi/ec.c b/src/ec/acpi/ec.c
index d3a6aaf..ab287d6 100644
--- a/src/ec/acpi/ec.c
+++ b/src/ec/acpi/ec.c
@@ -25,9 +25,18 @@
 #include <delay.h>
 #include "ec.h"
 
+#ifdef __PRE_RAM__
+
+static const int ec_cmd_reg = EC_SC;
+static const int ec_data_reg = EC_DATA;
+
+#else
+
 static int ec_cmd_reg = EC_SC;
 static int ec_data_reg = EC_DATA;
 
+#endif
+
 int send_ec_command(u8 command)
 {
 	int timeout;
@@ -132,12 +141,16 @@ void ec_clr_bit(u8 addr, u8 bit)
 	ec_write(addr, ec_read(addr) &  ~(1 << bit));
 }
 
+#ifndef __PRE_RAM__
+
 void ec_set_ports(u16 cmd_reg, u16 data_reg)
 {
 	ec_cmd_reg = cmd_reg;
 	ec_data_reg = data_reg;
 }
 
+#endif
+
 #if !defined(__SMM__) && !defined(__PRE_RAM__)
 struct chip_operations ec_acpi_ops = {
 	CHIP_NAME("ACPI Embedded Controller")