[coreboot-gerrit] Patch set updated for coreboot: c0b322e am335x: Add the config variable ROMSTAGE_BASE to the CPU's Kconfig.

Gabe Black (gabeblack@chromium.org) gerrit at coreboot.org
Mon Jul 15 08:32:53 CEST 2013


Gabe Black (gabeblack at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3582

-gerrit

commit c0b322e1f98fb7bffa8327962eca6339cce69bff
Author: Gabe Black <gabeblack at chromium.org>
Date:   Mon Jul 1 05:16:19 2013 -0700

    am335x: Add the config variable ROMSTAGE_BASE to the CPU's Kconfig.
    
    This variable wasn't being defined and was defaulting to zero when used in the
    ROM stage's linker script. This change defines it as a variable, and gives it
    a value which is slightly beyond the end of the bootblock. By making the ROM
    stage request to be loaded slightly farther into memory than it was loaded by
    the SOC's masked ROM, we ensure that it's moved away from the stage's metadata
    instead of on top of it. When it moves the other way, it clobbers important
    values like the entry point vefore the bootblock has had a chance to use them.
    
    Change-Id: I027a1365d05f1d79d7fc1e1349965ccb7d4e81b9
    Signed-off-by: Gabe Black <gabeblack at chromium.org>
---
 src/cpu/ti/am335x/Kconfig | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig
index 472fbe7..0c37eef 100644
--- a/src/cpu/ti/am335x/Kconfig
+++ b/src/cpu/ti/am335x/Kconfig
@@ -10,6 +10,17 @@ config BOOTBLOCK_BASE
 	hex
 	default 0x402f0400
 
+config CBFS_ROM_OFFSET
+	# Calculated by BL1 + max bootblock size.
+	default 0x4c00
+
+# We need to leave a gap between the bootblock and the ROM stage so that when
+# it is "loaded" to a slightly different place in on chip memory, it doesn't
+# clobber the metadata needed to actually enter it.
+config ROMSTAGE_BASE
+	hex
+	default 0x402f5400
+
 # Stack may reside in either IRAM or DRAM. We will define it to live
 # at the top of IRAM for now.
 #
@@ -27,11 +38,6 @@ config STACK_SIZE
 	hex
 	default 0x1000
 
-config CBFS_ROM_OFFSET
-	# Calculated by BL1 + max bootblock size.
-	hex "offset of CBFS data in ROM"
-	default 0x2800
-
 ## TODO Change this to some better address not overlapping bootblock when
 ## cbfstool supports creating header in arbitrary location.
 config CBFS_HEADER_ROM_OFFSET



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