[coreboot-gerrit] Patch set updated for coreboot: 57ea4a9 src/southbridge/intel/{lynxpoint, bd82x6x}/spi.c: correct spelling of attempted
Ronald G. Minnich (rminnich@gmail.com)
gerrit at coreboot.org
Thu Jul 11 18:31:57 CEST 2013
Ronald G. Minnich (rminnich at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3572
-gerrit
commit 57ea4a966e71385639ddf370bde0bf4562fe5feb
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date: Sat Jun 29 11:41:27 2013 +0200
src/southbridge/intel/{lynxpoint,bd82x6x}/spi.c: correct spelling of attempted
Change-Id: Ic6f6af6298fed2f41f140a7aa62dccf98bf60927
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
src/southbridge/intel/bd82x6x/spi.c | 2 +-
src/southbridge/intel/lynxpoint/spi.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c
index 09169b1..0c1f51c 100644
--- a/src/southbridge/intel/bd82x6x/spi.c
+++ b/src/southbridge/intel/bd82x6x/spi.c
@@ -677,7 +677,7 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
}
/*
- * Check if this is a write command atempting to transfer more bytes
+ * Check if this is a write command attempting to transfer more bytes
* than the controller can handle. Iterations for writes are not
* supported here because each SPI write command needs to be preceded
* and followed by other SPI commands, and this sequence is controlled
diff --git a/src/southbridge/intel/lynxpoint/spi.c b/src/southbridge/intel/lynxpoint/spi.c
index eaa17d5..5501efc 100644
--- a/src/southbridge/intel/lynxpoint/spi.c
+++ b/src/southbridge/intel/lynxpoint/spi.c
@@ -589,7 +589,7 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
}
/*
- * Check if this is a write command atempting to transfer more bytes
+ * Check if this is a write command attempting to transfer more bytes
* than the controller can handle. Iterations for writes are not
* supported here because each SPI write command needs to be preceded
* and followed by other SPI commands, and this sequence is controlled
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